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Lettnin, Djones Vinicius.

Overview

Works:	3 works in 1 publications in 1 languages

Titles

Synthesizable VHDL design for FPGAs by: Bezerra, Eduardo Augusto.; Lettnin, Djones Vinicius.; SpringerLink (Online service) (Electronic resources)

Subjects

Software Engineering/Programming and Operating Systems. Electronics and Microelectronics, Instrumentation. Field programmable gate arrays. Circuits and Systems. VHDL (Computer hardware description language) Engineering.

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