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以溶凝膠法製備矽酸鉿高介電材料 = Preparation of hig...

國立高雄大學應用化學系碩士班

以溶凝膠法製備矽酸鉿高介電材料 = Preparation of high–k material hafnium silicate by sol-gel method

Record Type:	Language materials, printed : monographic
Paralel Title:	Preparation of high–k material hafnium silicate by sol-gel method
Author:	陳麒麟,
Secondary Intellectual Responsibility:	國立高雄大學
Place of Publication:	[高雄市]
Published:	撰者;
Year of Publication:	2008[民97]
Description:	131面圖，表 : 30公分;
Subject:	矽酸鉿
Subject:	Hafnium oxide
Online resource:	http://handle.ncl.edu.tw/11296/ndltd/98038319930406568304
Notes:	指導教授：呂正傑
Notes:	參考書目：面98-103
Notes:	附錄：1.介面層厚度計算；2.電容-電壓特性曲線
Summary:	本論文利用溶凝膠法成功製備出的二氧化鉿以及矽酸鉿高介電薄膜於矽基板上，並將此高介98-電薄膜製成Metal-Insulator-Semiconductor (MIS) 結構，研究其特性並探討其取代二氧化矽作為閘極氧化層的可能性。實驗中矽酸鉿薄膜鍍製一至五層以分析厚度效應，並改變矽/鉿的摻雜比例以觀察薄膜特性隨成份變化，薄膜退火方式則分別採用爐管或快速熱退火爐，探討退火製程對薄膜物性、電性之影響。由實驗結果可知，在兩種退火方式下，矽之摻雜比例越高，薄膜厚度隨之提高，結晶所需的溫度也越高；而在高解析光電子能譜儀的分析中，我們發現含矽的比例增加，光電子能譜Hf4f、Si2p、O1s的訊號均會往較高鍵結能的方向偏移，且在溫度提高時亦會有發現相同的結論，此外矽酸鉿經快速熱退火的退火方式，似乎顯示出相分離的情形。高介電薄膜鍍製上電極後若經後退火，明顯發現可以改善電極/薄膜特性，因而使漏電流密度以及平帶電壓的偏移量下降；電性量測結果則發現薄膜漏電流密度大約在10-8~10-9 A/cm2之間，而經快速熱退火處理的薄膜漏電流密度小於經爐管退火，大部分特性也以快速熱退火處理後的薄膜較佳。 In present study, the hafnium oxide and hafnium silicate films with different silicon/hafnium ratios were prepared on silicon substrate by sol-gel method. The thin films were high temperature annealed by furnace annealing or rapid thermal annealing (RTA). In order to investigate the thickness effects of hafnium oxide and hafnium silicate, one to five layers of thin films were deposited by repetitive spin-on process. Then, a Metal-Insulator-Semiconductor (MIS) structure was constructed for electrical properties analysis. The experiment results showed that both the one layer thickness and crystallization temperature of film increased with the ratios of silicon/hafnium, regardless of annealing conditions. The binding energy of film surface was studied by X-ray photoelectron spectroscopy (XPS) analyses and indicated that the signal position of Hf4f, Si2p and O1s shifted to a higher binding energy by increasing the silicon/hafnium ratio or the annealing temperature. Otherwise, the XPS results of the hafnium silicate thin films, after annealed by RTA, suggested a possible occurrence of phase separation. For electrical property measurement, upper electrode was deposited on top of high-k film and then post-annealed to improve the electrode/film interface properties. We found that post-annealing reduced the leakage current of films to be 10-8~10-9 A/cm and also suppressed their flat band voltage shift. In conclusion, most properties of the thin films were observed to be better by RTA process than by furnace process.

以溶凝膠法製備矽酸鉿高介電材料 = Preparation of high–k material hafnium silicate by sol-gel method
陳, 麒麟

以溶凝膠法製備矽酸鉿高介電材料 = Preparation of high–k material hafnium silicate by sol-gel method / 陳麒麟撰 - [高雄市] : 撰者, 2008[民97]. - 131面 ; 圖，表 ; 30公分.
指導教授：呂正傑參考書目：面98-103附錄：1.介面層厚度計算；2.電容-電壓特性曲線.
矽酸鉿Hafnium oxide

以溶凝膠法製備矽酸鉿高介電材料 = Preparation of high–k material hafnium silicate by sol-gel method
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328 $a 碩士論文--國立高雄大學應用化學系碩士班
330 $a 本論文利用溶凝膠法成功製備出的二氧化鉿以及矽酸鉿高介電薄膜於矽基板上，並將此高介98-電薄膜製成Metal-Insulator-Semiconductor (MIS) 結構，研究其特性並探討其取代二氧化矽作為閘極氧化層的可能性。實驗中矽酸鉿薄膜鍍製一至五層以分析厚度效應，並改變矽/鉿的摻雜比例以觀察薄膜特性隨成份變化，薄膜退火方式則分別採用爐管或快速熱退火爐，探討退火製程對薄膜物性、電性之影響。由實驗結果可知，在兩種退火方式下，矽之摻雜比例越高，薄膜厚度隨之提高，結晶所需的溫度也越高；而在高解析光電子能譜儀的分析中，我們發現含矽的比例增加，光電子能譜Hf4f、Si2p、O1s的訊號均會往較高鍵結能的方向偏移，且在溫度提高時亦會有發現相同的結論，此外矽酸鉿經快速熱退火的退火方式，似乎顯示出相分離的情形。高介電薄膜鍍製上電極後若經後退火，明顯發現可以改善電極/薄膜特性，因而使漏電流密度以及平帶電壓的偏移量下降；電性量測結果則發現薄膜漏電流密度大約在10-8~10-9 A/cm2之間，而經快速熱退火處理的薄膜漏電流密度小於經爐管退火，大部分特性也以快速熱退火處理後的薄膜較佳。 In present study, the hafnium oxide and hafnium silicate films with different silicon/hafnium ratios were prepared on silicon substrate by sol-gel method. The thin films were high temperature annealed by furnace annealing or rapid thermal annealing (RTA). In order to investigate the thickness effects of hafnium oxide and hafnium silicate, one to five layers of thin films were deposited by repetitive spin-on process. Then, a Metal-Insulator-Semiconductor (MIS) structure was constructed for electrical properties analysis. The experiment results showed that both the one layer thickness and crystallization temperature of film increased with the ratios of silicon/hafnium, regardless of annealing conditions. The binding energy of film surface was studied by X-ray photoelectron spectroscopy (XPS) analyses and indicated that the signal position of Hf4f, Si2p and O1s shifted to a higher binding energy by increasing the silicon/hafnium ratio or the annealing temperature. Otherwise, the XPS results of the hafnium silicate thin films, after annealed by RTA, suggested a possible occurrence of phase separation. For electrical property measurement, upper electrode was deposited on top of high-k film and then post-annealed to improve the electrode/film interface properties. We found that post-annealing reduced the leakage current of films to be 10-8~10-9 A/cm and also suppressed their flat band voltage shift. In conclusion, most properties of the thin films were observed to be better by RTA process than by furnace process.
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