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Logic synthesis and verification alg...
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Hachtel, Gary D.
Logic synthesis and verification algorithms /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Logic synthesis and verification algorithms /by Gary D. Hachtel, Fabio Somenzi.
作者:
Hachtel, Gary D.
其他作者:
Somenzi, Fabio.
出版者:
Boston :Kluwer Academic Publishers,c1996.
面頁冊數:
xxxi, 564 p. :ill. ;26 cm.
標題:
Integrated circuitsVery large scale integration
ISBN:
0792397460 (acid-free paper) :
Logic synthesis and verification algorithms /
Hachtel, Gary D.
Logic synthesis and verification algorithms /
by Gary D. Hachtel, Fabio Somenzi. - Boston :Kluwer Academic Publishers,c1996. - xxxi, 564 p. :ill. ;26 cm.
Includes bibliographical references (p. 537-553) and index.
ISBN: 0792397460 (acid-free paper) :NT$3,470
LCCN: 96021769 Subjects--Topical Terms:
184718
Integrated circuits
--Very large scale integration
LC Class. No.: TK7874.75 / H117 1996
Dewey Class. No.: 621.39/5
Logic synthesis and verification algorithms /
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Logic synthesis and verification algorithms /
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