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Low-frequency noise in sub-100nm silicon structures.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Low-frequency noise in sub-100nm silicon structures.
Author:	Kramer, Theresa Anne.
Description:	165 p.
Notes:	Adviser: R. Fabian W. Pease.
Notes:	Source: Dissertation Abstracts International, Volume: 64-05, Section: B, page: 2242.
Contained By:	Dissertation Abstracts International64-05B.
Subject:	Physics, Condensed Matter.
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3090626
ISBN:	0496383485

Low-frequency noise in sub-100nm silicon structures.
Kramer, Theresa Anne.

Low-frequency noise in sub-100nm silicon structures. [electronic resource] - 165 p.

Adviser: R. Fabian W. Pease.

Thesis (Ph.D.)--Stanford University, 2003.

Low frequency noise in bulk MOSFETs is worse than in bipolar and JFET devices due to the effect of traps near the silicon/silicon dioxide interface. As device dimensions scale into the nanometer regime, deviations from constant-field scaling cause an increase in the average trap induced noise. Novel device configurations may allow us to reduce this noise and can be used to explore its lower limits.

ISBN: 0496383485Subjects--Topical Terms:

226939
Physics, Condensed Matter.

Low-frequency noise in sub-100nm silicon structures.
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502 $a Thesis (Ph.D.)--Stanford University, 2003.
520 # $a Low frequency noise in bulk MOSFETs is worse than in bipolar and JFET devices due to the effect of traps near the silicon/silicon dioxide interface. As device dimensions scale into the nanometer regime, deviations from constant-field scaling cause an increase in the average trap induced noise. Novel device configurations may allow us to reduce this noise and can be used to explore its lower limits.
520 # $a Nanometer-scale MOSFETs should exhibit very low trap populations, even zero in some cases, which should significantly affect the noise. We have built cylindrical surrounding-gate transistors with 0.018 square micron channel area, which is smaller than the size in which, on average, one trap would be active at typical trap densities. We observed a reduction in noise by two orders of magnitude when a trap is rendered inactive by biasing. In six of seven devices, the measured power spectral density of the drain current is more than an order of magnitude lower than that predicted using typical trap densities but still has regions of Lorentzian and 1/f shape. The near- 1/f shape and presence of random telegraph signals in the drain current indicate at least five active traps. This larger than expected number of active traps but lower than expected power spectral density means the devices must be populated by many traps which have much smaller effect on drain current than predicted.
520 # $a Physical separation of electrons and traps should reduce low frequency noise in MOSFETs by reducing electron/trap interactions. We have built depletion-mode surrounding-gate transistors that operate with the surface in accumulation or depletion and have simulated 1/f noise as a function of gate voltage. Simulations that include fluctuations in electron number and mobility and only consider electrons within one mean free path of the interface correctly predict the experimentally observed noise. Simulations that include all electrons or do not include both types of fluctuations do not. Experimentally we observed not only 1/f noise, but also excess Lorentzian noise near threshold; we attributed this to single electron trapping. This is consistent with our observation of random telegraph signals in the time domain.
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