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Writing testbenches using System Ver...

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Bergeron, Janick.

Writing testbenches using System Verilog /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Writing testbenches using System Verilog /by Janick Bergeron.
作者:	Bergeron, Janick.
其他作者:	Bergeron, Janick.
出版者:	New York :Springer,c2006.
面頁冊數:	xxvi, 412 p. :ill. ;25 cm.
附註:	This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available.
標題:	Computer hardware description languages.
ISBN:	0387312757

Writing testbenches using System Verilog /
Bergeron, Janick.

Writing testbenches using System Verilog /by Janick Bergeron. - New York :Springer,c2006. - xxvi, 412 p. :ill. ;25 cm.

This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available.

Includes bibliographical references and index.

ISBN: 0387312757

LCCN: 2005938214Subjects--Topical Terms:

224543
Computer hardware description languages.

LC Class. No.: TK7885.7 / .B496 2006

Dewey Class. No.: 621.39/2

Writing testbenches using System Verilog /
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245 1 0 $a Writing testbenches using System Verilog / $c by Janick Bergeron.
260 $a New York : $c c2006. $b Springer,
300 $a xxvi, 412 p. : $b ill. ; $c 25 cm.
500 $a This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available.
504 $a Includes bibliographical references and index.
650 $a Computer hardware description languages. $3 224543
650 $a Integrated circuits $x Verification. $3 185514
700 $a Bergeron, Janick. $3 257777

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