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SystemVerilog for verification :a gu...

Spear, Chris.

SystemVerilog for verification :a guide to learning the testbench language features /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	SystemVerilog for verification :Chris Spear.
Reminder of title:	a guide to learning the testbench language features /
Author:	Spear, Chris.
Published:	New York, NY :Springer,c2006.
Description:	xxxiv, 301 p. :ill. ;24 cm.
Subject:	Integrated circuitsVerification.
ISBN:	0387270388 (e-isbn)

SystemVerilog for verification :a guide to learning the testbench language features /
Spear, Chris.

SystemVerilog for verification :a guide to learning the testbench language features /Chris Spear. - New York, NY :Springer,c2006. - xxxiv, 301 p. :ill. ;24 cm.

Includes bibliographical references (p. [295]-296) and index.

ISBN: 0387270388 (e-isbn)

LCCN: 2006926262Subjects--Topical Terms:

185514
Integrated circuits
--Verification.

LC Class. No.: TK7885.7 / .S741 2006

Dewey Class. No.: 621.39/2

SystemVerilog for verification :a guide to learning the testbench language features /
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010 $a 2006926262
020 $a 0387270388 (e-isbn)
020 $a 9780387270364 (hbk.)
020 $a 9780387270388 (e-isbn)
020 $a 0387270361 (hbk.) : $c NT$4072
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040 $a OHX $c OHX $d BAKER $d DLC $d OCLCQ $d TXA $d YDXCP
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050 4 $a TK7885.7 $b .S741 2006
082 0 0 $2 22 $a 621.39/2
100 $a Spear, Chris. $3 257829
245 1 0 $a SystemVerilog for verification : $b a guide to learning the testbench language features / $c Chris Spear.
260 $a New York, NY : $c c2006. $b Springer,
300 $a xxxiv, 301 p. : $b ill. ; $c 24 cm.
504 $a Includes bibliographical references (p. [295]-296) and index.
650 $a Integrated circuits $x Verification. $3 185514
650 $a Verilog (Computer hardware description language) $3 182774