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Low power and reliable SRAM memory c...
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Ishibashi, Koichiro.
Low power and reliable SRAM memory cell and array design
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Low power and reliable SRAM memory cell and array designedited by Koichiro Ishibashi, Kenichi Osada.
其他作者:
Ishibashi, Koichiro.
出版者:
Berlin, Heidelberg :Springer-Verlag Berlin Heidelberg,2011.
面頁冊數:
xi, 143 p. :ill., digital ;24 cm.
叢書名:
Springer series in advanced microelectronics,
Contained By:
Springer eBooks
標題:
Low voltage integrated circuitsDesign and construction.
電子資源:
http://dx.doi.org/10.1007/978-3-642-19568-6
ISBN:
9783642195686 (electronic bk.)
Low power and reliable SRAM memory cell and array design
Low power and reliable SRAM memory cell and array design
[electronic resource] /edited by Koichiro Ishibashi, Kenichi Osada. - Berlin, Heidelberg :Springer-Verlag Berlin Heidelberg,2011. - xi, 143 p. :ill., digital ;24 cm. - Springer series in advanced microelectronics,311437-0387 ;.
ISBN: 9783642195686 (electronic bk.)Subjects--Topical Terms:
184466
Low voltage integrated circuits
--Design and construction.
LC Class. No.: TK7874.66 / .L69 2011
Dewey Class. No.: 621.395
Low power and reliable SRAM memory cell and array design
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