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Design of integrated on-chip impedan...
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Colorado State University.
Design of integrated on-chip impedance sensors.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Design of integrated on-chip impedance sensors.
作者:
Kern, Tucker.
面頁冊數:
105 p.
附註:
Source: Masters Abstracts International, Volume: 53-05.
附註:
Adviser: Thomas W. Chen.
Contained By:
Masters Abstracts International53-05(E).
標題:
Electrical engineering.
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1564470
ISBN:
9781321168013
Design of integrated on-chip impedance sensors.
Kern, Tucker.
Design of integrated on-chip impedance sensors.
- 105 p.
Source: Masters Abstracts International, Volume: 53-05.
Thesis (M.S.)--Colorado State University, 2014.
This item must not be sold to any third party vendors.
In this thesis two integrated sensor systems for measuring the impedance of a device under test (DUT) are presented. Both sensors have potential applications in label-free affinity biosensors for biological and bio-medical analysis. The first sensor is a purely capacitive sensor that operates on the theory of capacitive division. Test capacitance is placed within a capacitive divider and produces an output voltage proportional to its value. This voltage is then converted to a time-domain signal for easy readout. The prototype capacitive sensor shows a resolution of 5 fF on a base of 500 fF, which corresponds to a 1 % resolution. The second sensor, a general purpose impedance sensor calculates the ratio between a DUT and reference impedance when stimulated by a sinusoidal signal. Computation of DUT magnitude and phase is accomplished in silicon via mixed-signal division and a phase module. An automatic gain controller (AGC) allows the sensor to measure impedance from 30 &OHgr; to 2.5 M&OHgr; with no more than 10 % error and a resolution of at least .44 %.
ISBN: 9781321168013Subjects--Topical Terms:
454503
Electrical engineering.
Design of integrated on-chip impedance sensors.
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Design of integrated on-chip impedance sensors.
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Source: Masters Abstracts International, Volume: 53-05.
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Adviser: Thomas W. Chen.
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Thesis (M.S.)--Colorado State University, 2014.
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This item must not be sold to any third party vendors.
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In this thesis two integrated sensor systems for measuring the impedance of a device under test (DUT) are presented. Both sensors have potential applications in label-free affinity biosensors for biological and bio-medical analysis. The first sensor is a purely capacitive sensor that operates on the theory of capacitive division. Test capacitance is placed within a capacitive divider and produces an output voltage proportional to its value. This voltage is then converted to a time-domain signal for easy readout. The prototype capacitive sensor shows a resolution of 5 fF on a base of 500 fF, which corresponds to a 1 % resolution. The second sensor, a general purpose impedance sensor calculates the ratio between a DUT and reference impedance when stimulated by a sinusoidal signal. Computation of DUT magnitude and phase is accomplished in silicon via mixed-signal division and a phase module. An automatic gain controller (AGC) allows the sensor to measure impedance from 30 &OHgr; to 2.5 M&OHgr; with no more than 10 % error and a resolution of at least .44 %.
520
$a
Prototypes of both sensing topologies were implemented in a .18 microm CMOS process and their operation in silicon was verified. The prototype capacitive sensor required a circuit area of .014 mm2 and successfully demonstrated a resolution of 5 fF in silicon. A prototype impedance sensor without the phase module or AGC was implemented with a circuit area of .17 mm2. Functional verification of the peak capture systems and mixed-signal divider was accomplished. The complete implementation of the impedance sensor, with phase module and AGC, requires an estimated .28 mm 2 of circuit area.
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