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Fundamentals of bias temperature ins...
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Mahapatra, Souvik.
Fundamentals of bias temperature instability in MOS transistorscharacterization methods, process and materials impact, DC and AC modeling /
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Fundamentals of bias temperature instability in MOS transistorsedited by Souvik Mahapatra.
其他題名:
characterization methods, process and materials impact, DC and AC modeling /
其他作者:
Mahapatra, Souvik.
出版者:
New Delhi :Springer India :2016.
面頁冊數:
xvi, 269 p. :ill., digital ;24 cm.
Contained By:
Springer eBooks
標題:
Metal oxide semiconductor field-effect transistors.
電子資源:
http://dx.doi.org/10.1007/978-81-322-2508-9
ISBN:
9788132225089$q(electronic bk.)
Fundamentals of bias temperature instability in MOS transistorscharacterization methods, process and materials impact, DC and AC modeling /
Fundamentals of bias temperature instability in MOS transistors
characterization methods, process and materials impact, DC and AC modeling /[electronic resource] :edited by Souvik Mahapatra. - New Delhi :Springer India :2016. - xvi, 269 p. :ill., digital ;24 cm. - Springer series in advanced microelectronics,v.521437-0387 ;. - Springer series in advanced microelectronics ;3..
Introduction: Bias Temperature Instability (BTI) in N and P Channel MOSFETs -- Characterization Methods for BTI Degradation and Associated Gate Insulator Defects -- Physical Mechanism of BTI Degradation - Direct Estimation of Trap Generation and Trapping -- Physical Mechanism of BTI Degradation-Modeling of Process and Material Dependence -- Reaction-Diffusion Model -- Modeling of DC and AC NBTI Degradation and Recovery for SiON and HKMG MOSFETs -- Index.
This book aims to cover different aspects of Bias Temperature Instability (BTI) BTI remains as an important reliability concern for CMOS transistors and circuits. Development of BTI resilient technology relies on utilizing artefact-free stress and measurement methods and suitable physics-based models for accurate determination of degradation at end-of-life, and understanding the gate insulator process impact on BTI. This book discusses different ultra-fast characterization techniques for recovery artefact free BTI measurements. It also covers different direct measurements techniques to access pre-existing and newly generated gate insulator traps responsible for BTI. The book provides a consistent physical framework for NBTI and PBTI respectively for p- and n- channel MOSFETs, consisting of trap generation and trapping. A physics-based compact model is presented to estimate measured BTI degradation in planar Si MOSFETs having differently processed SiON and HKMG gate insulators, in planar SiGe MOSFETs and also in Si FinFETs. The contents also include a detailed investigation of the gate insulator process dependence of BTI in differently processed SiON and HKMG MOSFETs. The book then goes on to discuss Reaction-Diffusion (RD) model to estimate generation of new traps for DC and AC NBTI stress, and Transient Trap Occupancy Model (TTOM) to estimate charge occupancy of generated traps and their contribution to BTI degradation. Finally, a comprehensive NBTI modeling framework including TTOM enabled RD model and hole trapping to predict time evolution of BTI degradation and recovery during and after DC stress for different stress and recovery biases and temperature, during consecutive arbitrary stress and recovery cycles, and during AC stress at different frequency and duty cycle. The contents of this book should prove useful to academia and professionals alike.
ISBN: 9788132225089$q(electronic bk.)
Standard No.: 10.1007/978-81-322-2508-9doiSubjects--Topical Terms:
221791
Metal oxide semiconductor field-effect transistors.
LC Class. No.: TK7871.95 / .F86 2016
Dewey Class. No.: 621.3815284
Fundamentals of bias temperature instability in MOS transistorscharacterization methods, process and materials impact, DC and AC modeling /
LDR
:03467nmm a2200325 a 4500
001
481120
003
DE-He213
005
20160715152813.0
006
m d
007
cr nn 008maaau
008
161007s2016 ii s 0 eng d
020
$a
9788132225089$q(electronic bk.)
020
$a
9788132225072$q(paper)
024
7
$a
10.1007/978-81-322-2508-9
$2
doi
035
$a
978-81-322-2508-9
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7871.95
$b
.F86 2016
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
082
0 4
$a
621.3815284
$2
23
090
$a
TK7871.95
$b
.F981 2016
245
0 0
$a
Fundamentals of bias temperature instability in MOS transistors
$h
[electronic resource] :
$b
characterization methods, process and materials impact, DC and AC modeling /
$c
edited by Souvik Mahapatra.
260
$a
New Delhi :
$b
Springer India :
$b
Imprint: Springer,
$c
2016.
300
$a
xvi, 269 p. :
$b
ill., digital ;
$c
24 cm.
490
1
$a
Springer series in advanced microelectronics,
$x
1437-0387 ;
$v
v.52
505
0
$a
Introduction: Bias Temperature Instability (BTI) in N and P Channel MOSFETs -- Characterization Methods for BTI Degradation and Associated Gate Insulator Defects -- Physical Mechanism of BTI Degradation - Direct Estimation of Trap Generation and Trapping -- Physical Mechanism of BTI Degradation-Modeling of Process and Material Dependence -- Reaction-Diffusion Model -- Modeling of DC and AC NBTI Degradation and Recovery for SiON and HKMG MOSFETs -- Index.
520
$a
This book aims to cover different aspects of Bias Temperature Instability (BTI) BTI remains as an important reliability concern for CMOS transistors and circuits. Development of BTI resilient technology relies on utilizing artefact-free stress and measurement methods and suitable physics-based models for accurate determination of degradation at end-of-life, and understanding the gate insulator process impact on BTI. This book discusses different ultra-fast characterization techniques for recovery artefact free BTI measurements. It also covers different direct measurements techniques to access pre-existing and newly generated gate insulator traps responsible for BTI. The book provides a consistent physical framework for NBTI and PBTI respectively for p- and n- channel MOSFETs, consisting of trap generation and trapping. A physics-based compact model is presented to estimate measured BTI degradation in planar Si MOSFETs having differently processed SiON and HKMG gate insulators, in planar SiGe MOSFETs and also in Si FinFETs. The contents also include a detailed investigation of the gate insulator process dependence of BTI in differently processed SiON and HKMG MOSFETs. The book then goes on to discuss Reaction-Diffusion (RD) model to estimate generation of new traps for DC and AC NBTI stress, and Transient Trap Occupancy Model (TTOM) to estimate charge occupancy of generated traps and their contribution to BTI degradation. Finally, a comprehensive NBTI modeling framework including TTOM enabled RD model and hole trapping to predict time evolution of BTI degradation and recovery during and after DC stress for different stress and recovery biases and temperature, during consecutive arbitrary stress and recovery cycles, and during AC stress at different frequency and duty cycle. The contents of this book should prove useful to academia and professionals alike.
650
0
$a
Metal oxide semiconductor field-effect transistors.
$3
221791
650
1 4
$a
Engineering.
$3
210888
650
2 4
$a
Circuits and Systems.
$3
274416
650
2 4
$a
Electronics and Microelectronics, Instrumentation.
$3
274412
650
2 4
$a
Solid State Physics.
$3
376486
700
1
$a
Mahapatra, Souvik.
$3
736922
710
2
$a
SpringerLink (Online service)
$3
273601
773
0
$t
Springer eBooks
830
0
$a
Springer series in advanced microelectronics ;
$v
3.
$3
444554
856
4 0
$u
http://dx.doi.org/10.1007/978-81-322-2508-9
950
$a
Engineering (Springer-11647)
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