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Fault-tolerant digital microfluidic ...

Pop, Paul.

Fault-tolerant digital microfluidic biochipscompilation and synthesis /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Fault-tolerant digital microfluidic biochipsby Paul Pop ... [et al.].
其他題名:	compilation and synthesis /
其他作者:	Pop, Paul.
出版者:	Cham :Springer International Publishing :2016.
面頁冊數:	xii, 234 p. :ill., digital ;24 cm.
Contained By:	Springer eBooks
標題:	Biochips.
電子資源:	http://dx.doi.org/10.1007/978-3-319-23072-6
ISBN:	9783319230726$q(electronic bk.)

Fault-tolerant digital microfluidic biochipscompilation and synthesis /
Fault-tolerant digital microfluidic biochipscompilation and synthesis /[electronic resource] :by Paul Pop ... [et al.]. - Cham :Springer International Publishing :2016. - xii, 234 p. :ill., digital ;24 cm.

Introduction -- Biochips: technologies and trends -- Digital microfluidic biochips -- Biochip architecture models -- Biochemical application programming and applications models -- Design methodology: the compilation and synthesis problems -- State-of-the-art research on compilation and synthesis -- Module-based compilation with reconfigurable operation execution -- Routing-based compilation -- Compilation for error recovery -- Synthesis of fault-tolerant architectures -- Synthesis of application-specific architectures -- Benchmarks and evaluation -- Conclusions and future work directions.

ISBN: 9783319230726$q(electronic bk.)

Standard No.: 10.1007/978-3-319-23072-6doiSubjects--Topical Terms:

209040
Biochips.

LC Class. No.: R857.B5

Dewey Class. No.: 610.285

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505 0 $a Introduction -- Biochips: technologies and trends -- Digital microfluidic biochips -- Biochip architecture models -- Biochemical application programming and applications models -- Design methodology: the compilation and synthesis problems -- State-of-the-art research on compilation and synthesis -- Module-based compilation with reconfigurable operation execution -- Routing-based compilation -- Compilation for error recovery -- Synthesis of fault-tolerant architectures -- Synthesis of application-specific architectures -- Benchmarks and evaluation -- Conclusions and future work directions.
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