國立高雄大學圖資館 |

語系: 繁體中文

說明(常見問題)

圖資館首頁

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

VLSI-SoCnew technology enabler : 27t...

(1998 :)

VLSI-SoCnew technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	VLSI-SoCedited by Carolina Metzler ... [et al.].
其他題名:	new technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers /
其他題名:	VLSI-SoC 2019
其他作者:	Metzler, Carolina.
團體作者:
出版者:	Cham :Springer International Publishing :2020.
面頁冊數:	xvii, 345 p. :ill., digital ;24 cm.
Contained By:	Springer Nature eBook
標題:	Integrated circuitsCongresses.Very large scale integration
電子資源:	https://doi.org/10.1007/978-3-030-53273-4
ISBN:	9783030532734$q(electronic bk.)

VLSI-SoCnew technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers /
VLSI-SoCnew technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers /[electronic resource] :VLSI-SoC 2019edited by Carolina Metzler ... [et al.]. - Cham :Springer International Publishing :2020. - xvii, 345 p. :ill., digital ;24 cm. - IFIP advances in information and communication technology,5861868-4238 ;. - IFIP advances in information and communication technology ;370..

Software-Based Self-Test for Delay Faults -- On Test Generation for Microprocessors for Extended Class of Functional Faults -- Robust FinFET Schmitt Trigger Designs for Low Power Applications -- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults -- Process Variability Impact on the SET Response of FinFET Multi-level Design -- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques -- A Statistical Wafer Scale Error and Redundancy Analysis Simulator -- Hardware-enabled Secure Firmware Updates in Embedded Systems -- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance -- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs -- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers -- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing -- Semi- and Fully-Random Access LUTs for Smooth Functions -- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors -- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework.

This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.

ISBN: 9783030532734$q(electronic bk.)

Standard No.: 10.1007/978-3-030-53273-4doiSubjects--Topical Terms:

484911
Integrated circuits
--Very large scale integration--Congresses.

LC Class. No.: TK7874

Dewey Class. No.: 621.395

VLSI-SoCnew technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers /
LDR:03187nmm a2200349 a 4500 001 583461
003 DE-He213
005 20200722095311.0
006 m d
007 cr nn 008maaau
008 210202s2020 sz s 0 eng d
020 $a 9783030532734$q(electronic bk.)
020 $a 9783030532727$q(paper)
024 7 $a 10.1007/978-3-030-53273-4 $2 doi
035 $a 978-3-030-53273-4
040 $a GP $c GP
041 0 $a eng
050 4 $a TK7874
072 7 $a UT $2 bicssc
072 7 $a COM043000 $2 bisacsh
072 7 $a UT $2 thema
082 0 4 $a 621.395 $2 23
090 $a TK7874 $b .I23 2019
111 2 $n (3rd : $d 1998 : $c Amsterdam, Netherlands) $3 194767
245 1 0 $a VLSI-SoC $h [electronic resource] : $b new technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019 : revised and extended selected papers / $c edited by Carolina Metzler ... [et al.].
246 3 $a VLSI-SoC 2019
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2020.
300 $a xvii, 345 p. : $b ill., digital ; $c 24 cm.
490 1 $a IFIP advances in information and communication technology, $x 1868-4238 ; $v 586
505 0 $a Software-Based Self-Test for Delay Faults -- On Test Generation for Microprocessors for Extended Class of Functional Faults -- Robust FinFET Schmitt Trigger Designs for Low Power Applications -- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults -- Process Variability Impact on the SET Response of FinFET Multi-level Design -- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques -- A Statistical Wafer Scale Error and Redundancy Analysis Simulator -- Hardware-enabled Secure Firmware Updates in Embedded Systems -- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance -- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs -- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers -- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing -- Semi- and Fully-Random Access LUTs for Smooth Functions -- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors -- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework.
520 $a This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
650 0 $a Integrated circuits $x Very large scale integration $v Congresses. $3 484911
650 0 $a Systems on a chip $v Congresses. $3 447320
650 0 $a Computer network architectures $3 253435
650 0 $a Internet of things $v Congresses. $3 696440
650 1 4 $a Computer Systems Organization and Communication Networks. $3 273709
650 2 4 $a Control Structures and Microprogramming. $3 274663
650 2 4 $a Input/Output and Data Communications. $3 274473
650 2 4 $a Operating Systems. $3 274474
700 1 $a Metzler, Carolina. $3 874023
710 2 $a SpringerLink (Online service) $3 273601
773 0 $t Springer Nature eBook
830 0 $a IFIP advances in information and communication technology ; $v 370. $3 559662
856 4 0 $u https://doi.org/10.1007/978-3-030-53273-4
950 $a Computer Science (SpringerNature-11645)