語系:
繁體中文
English
說明(常見問題)
圖資館首頁
登入
回首頁
到查詢結果
[ author_sort:"kahng, andrew b." ]
切換:
標籤
|
MARC模式
|
ISBD
VLSI physical design: from graph partitioning to timing closure
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
VLSI physical design: from graph partitioning to timing closureby Andrew B. Kahng ... [et al.].
其他作者:
Kahng, Andrew B.
出版者:
Cham :Springer International Publishing :2022.
面頁冊數:
xvii, 317 p. :ill., digital ;24 cm.
Contained By:
Springer Nature eBook
標題:
Integrated circuitsVery large scale integration
電子資源:
https://doi.org/10.1007/978-3-030-96415-3
ISBN:
9783030964153$q(electronic bk.)
VLSI physical design: from graph partitioning to timing closure
VLSI physical design: from graph partitioning to timing closure
[electronic resource] /by Andrew B. Kahng ... [et al.]. - Second edition. - Cham :Springer International Publishing :2022. - xvii, 317 p. :ill., digital ;24 cm.
1 Introduction -- 2 Netlist and System Partitioning -- 3 Chip Planning -- 4 Global and Detailed Placement -- 5 Global Routing -- 6 Detailed Routing -- 7 Specialized Routing -- 8 Timing Closure. A Solutions to Chapter Exercises -- B Example CMOS Cell Layouts.
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings. "This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics." Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group "This is the book I wish I had when I taught EDA in the past, and the one I'm using from now on." Dr. Louis K. Scheffer, Howard Hughes Medical Institute "I would happily use this book when teaching Physical Design. I know of no other work that's as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!" Prof. John P. Hayes, University of Michigan "The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure." Prof. Kurt Keutzer, University of California, Berkeley "An excellent balance of the basics and more advanced concepts, presented by top experts in the field." Prof. Sachin Sapatnekar, University of Minnesota.
ISBN: 9783030964153$q(electronic bk.)
Standard No.: 10.1007/978-3-030-96415-3doiSubjects--Topical Terms:
182089
Integrated circuits
--Very large scale integration
LC Class. No.: TK7874
Dewey Class. No.: 621.395
VLSI physical design: from graph partitioning to timing closure
LDR
:03676nmm a2200349 a 4500
001
625806
003
DE-He213
005
20220621205252.0
006
m d
007
cr nn 008maaau
008
230109s2022 sz s 0 eng d
020
$a
9783030964153$q(electronic bk.)
020
$a
9783030964146$q(paper)
024
7
$a
10.1007/978-3-030-96415-3
$2
doi
035
$a
978-3-030-96415-3
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7874
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
072
7
$a
TJFC
$2
thema
082
0 4
$a
621.395
$2
23
090
$a
TK7874
$b
.V871 2022
245
0 0
$a
VLSI physical design: from graph partitioning to timing closure
$h
[electronic resource] /
$c
by Andrew B. Kahng ... [et al.].
250
$a
Second edition.
260
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2022.
300
$a
xvii, 317 p. :
$b
ill., digital ;
$c
24 cm.
338
$a
online resource
$b
cr
$2
rdacarrier
505
0
$a
1 Introduction -- 2 Netlist and System Partitioning -- 3 Chip Planning -- 4 Global and Detailed Placement -- 5 Global Routing -- 6 Detailed Routing -- 7 Specialized Routing -- 8 Timing Closure. A Solutions to Chapter Exercises -- B Example CMOS Cell Layouts.
520
$a
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings. "This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics." Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group "This is the book I wish I had when I taught EDA in the past, and the one I'm using from now on." Dr. Louis K. Scheffer, Howard Hughes Medical Institute "I would happily use this book when teaching Physical Design. I know of no other work that's as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!" Prof. John P. Hayes, University of Michigan "The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure." Prof. Kurt Keutzer, University of California, Berkeley "An excellent balance of the basics and more advanced concepts, presented by top experts in the field." Prof. Sachin Sapatnekar, University of Minnesota.
650
0
$a
Integrated circuits
$x
Very large scale integration
$x
Design and construction.
$3
182089
650
0
$a
Timing circuits
$x
Design and construction.
$3
225090
650
0
$a
Computer-aided design.
$3
181931
650
1 4
$a
Electronic Circuits and Systems.
$3
913394
650
2 4
$a
Logic Design.
$3
276275
650
2 4
$a
Electronics and Microelectronics, Instrumentation.
$3
274412
650
2 4
$a
Computer-Aided Engineering (CAD, CAE) and Design.
$3
274500
700
1
$a
Kahng, Andrew B.
$3
510713
710
2
$a
SpringerLink (Online service)
$3
273601
773
0
$t
Springer Nature eBook
856
4 0
$u
https://doi.org/10.1007/978-3-030-96415-3
950
$a
Engineering (SpringerNature-11647)
筆 0 讀者評論
全部
電子館藏
館藏
1 筆 • 頁數 1 •
1
條碼號
館藏地
館藏流通類別
資料類型
索書號
使用類型
借閱狀態
預約狀態
備註欄
附件
000000215611
電子館藏
1圖書
電子書
EB TK7874 .V871 2022 2022
一般使用(Normal)
在架
0
1 筆 • 頁數 1 •
1
多媒體
多媒體檔案
https://doi.org/10.1007/978-3-030-96415-3
評論
新增評論
分享你的心得
Export
取書館別
處理中
...
變更密碼
登入