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Atlas: Software development environm...

Stanford University.

Atlas: Software development environment for hardware Transactional Memory.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Atlas: Software development environment for hardware Transactional Memory.
作者:	Wee, Sewook.
面頁冊數:	95 p.
附註:	Adviser: Christos Kozyrakis.
附註:	Source: Dissertation Abstracts International, Volume: 69-05, Section: B, page: 3114.
Contained By:	Dissertation Abstracts International69-05B.
標題:	Computer Science.
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3313683
ISBN:	9780549622680

Atlas: Software development environment for hardware Transactional Memory.
Wee, Sewook.

Atlas: Software development environment for hardware Transactional Memory. - 95 p.

Adviser: Christos Kozyrakis.

Thesis (Ph.D.)--Stanford University, 2008.

ATLAS builds upon TM resources to provide three functional and performance debugging tools for parallel programming. The first tool, ReplayT, provides the deterministic replay of multithreaded applications; it tracks execution at the granularity of transactions to reduce both the time and space overhead of logging thread interactions. The second tool, AVIO-TM, detects atomicity violation bugs in transactional memory programs. It extends, simplifies, and accelerates the proposed AVIO mechanism. The third tool, TAPE, is a light-weight runtime performance bottleneck monitor that identifies the performance bottlenecks of TM applications with the detailed information that is needed to optimize the applications. TAPE builds upon TM hardware that continuously monitors all memory accesses in the user code.

ISBN: 9780549622680Subjects--Topical Terms:

212513
Computer Science.

Atlas: Software development environment for hardware Transactional Memory.
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520 $a Multi-cores are already available on today's personal computers, and parallel programming is the key to utilizing their scalable performance. However, writing a fast and correct parallel program is still difficult because multiple threads run on the shared data; thus, programmers should synchronize them properly. To address this difficulty, Transactional Memory (TM) has been proposed as an alternative to conventional lock-based synchronization. TM can be implemented in a variety of ways; software TM (STM) is attractive because it runs on off-the-shelf hardware without modification, whereas hardware TM (HTM) performs much better and provides correct and predictable results. This research is built upon the Transactional Coherence and Consistency architecture (TCC), an HTM architecture developed at Stanford University. Moreover, unlike other proposals, TCC uses TM mechanisms to replace conventional MESI (Modified-Exclusive-Shared-Invalid) protocol, having all user code executes within transactions---i.e. all transactions, all the time.
520 $a To develop parallel applications that fully utilize TM's capability, a complete software development environment is necessary. The software environment includes programming languages, an operating system, and performance and functionality debugging tools. This thesis presents a software development environment, referred to as ATLAS; it addresses the challenges of the latter two issues, the operating system and the productivity tools, on the full-system prototype of the TCC architecture. Running an operating system on an HTM system faces many challenges: it requires a communication mechanism between the user thread and the operating system that does not compromise the atomicity and isolation of transactions; It also requires a mechanism to handle irrevocable operations, such as I/O, and external actions, such as interrupts. ATLAS addresses these issues by dedicating a CPU to run the operating system (OS CPU). The remaining CPUs run a proxy kernel that handles the interactions of the applications with the operating system using a separate communication channel. This thesis describes the implementation of OS functionality using this approach and demonstrates that it scales efficiently to multi-core systems with 32 processors.
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