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[ author_sort:"uyemura, john p. (1952-)" ]
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Chip design for submicron VLSI :CMOS...
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Uyemura, John P. (1952-)
Chip design for submicron VLSI :CMOS layout and simulation /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Chip design for submicron VLSI :John P. Uyemura.
其他題名:
CMOS layout and simulation /
其他題名:
CMOS layout and simulation
作者:
Uyemura, John P.
出版者:
Australia :Thomson/Nelson,c2006.
面頁冊數:
xvi, 411 p. :ill. ;25 cm.
標題:
Metal oxide semiconductors, ComplementaryDesign and construction.
ISBN:
053446629X :
Chip design for submicron VLSI :CMOS layout and simulation /
Uyemura, John P.1952-
Chip design for submicron VLSI :
CMOS layout and simulation /CMOS layout and simulationJohn P. Uyemura. - Australia :Thomson/Nelson,c2006. - xvi, 411 p. :ill. ;25 cm.
Includes bibliographical references and index.
Minimum system requirements: Windows 98SE, XP, 2000 or NT; 64 MB system RAM; Pentium or compatible CPU.
ISBN: 053446629X :NT$3234
LCCN: 2004117356Subjects--Uniform Titles:
Microwind.
Subjects--Topical Terms:
184363
Metal oxide semiconductors, Complementary
--Design and construction.
LC Class. No.: TK7871.99.M44 / U97 2006
Chip design for submicron VLSI :CMOS layout and simulation /
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