Zilic, Zeljko.
概要
| 作品: | 0 作品在 0 項出版品 0 種語言 | |
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書目資訊
Verification by error modeling :using testing techniques in hardware verification
by:
Radecka, Katarzyna.; SpringerLink (Online service); Zilic, Zeljko.
(書目-電子資源)
Accelerating test, validation and debug of high speed serial interfaces
by:
Fan, Yongquan.; SpringerLink (Online service); Zilic, Zeljko.
(書目-電子資源)