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Taraate, Vaibbhav.

Overview
Works: 1 works in 9 publications in 1 languages
Titles
Advanced HDL synthesis and SOC prototypingRTL design using verilog / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
Digital design techniques and exercisesa practice book for digital logic design / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
ASIC design and synthesis : RTL design using Verilog / by: Taraate, Vaibbhav. (Language materials, printed)
Digital design from the VLSI perspectiveconcepts for VLSI beginners / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
Digital logic design sing Verilogcoding and RTL synthesis / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
Logic synthesis and SOC prototypingRTL design using VHDL / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
ASIC design and synthesisRTL design using Verilog / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
SystemVerilog for hardware descriptionRTL design and verification / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
PLD based design with VHDLRTL design, synthesis and implementation / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
Digital logic design using Verilogcoding and RTL synthesis / by: SpringerLink (Online service); Taraate, Vaibbhav. (Electronic resources)
 
 
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