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以FPGA為平台之嵌入式類神經網路語音辨識系統實現 = A FPGA-b...

國立高雄大學電機工程學系碩士班

以FPGA為平台之嵌入式類神經網路語音辨識系統實現 = A FPGA-based Embedded Speech Recognition System Design by Neural Network

Record Type:	Language materials, printed : monographic
Paralel Title:	A FPGA-based Embedded Speech Recognition System Design by Neural Network
Author:	蔡博宇,
Secondary Intellectual Responsibility:	國立高雄大學
Place of Publication:	[高雄市]
Published:	撰者;
Year of Publication:	2009[民98]
Description:	58面圖，表 : 30公分;
Subject:	倒傳遞類神經網路
Subject:	Back-Propagation Neural Network
Online resource:	http://handle.ncl.edu.tw/11296/ndltd/09171834505697118877
Summary:	本篇論文利用倒傳遞式類神經網路，來進行語音辨識，並且實現在嵌入式平台上。由於在進行語音處理的過程中，在FFT的計算時有大量的浮點數運算，且平台沒支援浮點數運算的硬體，所以需要很長的計算時間。在本篇論文中，我們使用整數的FFT取代原本的浮點數FFT，在不影響原本的辨識率下，可大量減少計算的時間，提昇語音辨識速度。 A Back-Propagation Neural Network was used to process speech recognition in order to implement the result on the embedded platform. Due to abundant float-points that were the result of FFT multiplication, supportive hard-ware that should be used for speech recognition could not be found. Therefore long calculation times were needed. An integer was used to replace the float-points in the FFT multiplication calculations in this study and it is hoped that the calculation time could be shortened and the speed of speech recognition increased to the original recognition rate.

以FPGA為平台之嵌入式類神經網路語音辨識系統實現 = A FPGA-based Embedded Speech Recognition System Design by Neural Network
蔡, 博宇

以FPGA為平台之嵌入式類神經網路語音辨識系統實現 = A FPGA-based Embedded Speech Recognition System Design by Neural Network / 蔡博宇撰 - [高雄市] : 撰者, 2009[民98]. - 58面 ; 圖，表 ; 30公分.
參考̆書目：面48-49.
倒傳遞類神經網路Back-Propagation Neural Network

以FPGA為平台之嵌入式類神經網路語音辨識系統實現 = A FPGA-based Embedded Speech Recognition System Design by Neural Network
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