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Scalable Hardware Verification with Symbolic Simulation /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Scalable Hardware Verification with Symbolic Simulation /by Valeria Bertacco.
作者:	Bertacco, Valeria.
出版者:	Boston, MA :Springer Science+Business Media, Inc.,2006.
面頁冊數:	v.: digital
標題:	Computer engineering
電子資源:	http://dx.doi.org/10.1007/0-387-29906-8
ISBN:	9780387244112 (paper)

Scalable Hardware Verification with Symbolic Simulation /
Bertacco, Valeria.

Scalable Hardware Verification with Symbolic Simulation /[electronic resource] /by Valeria Bertacco. - Boston, MA :Springer Science+Business Media, Inc.,2006. - v.: digital

ISBN: 9780387244112 (paper)Subjects--Topical Terms:

252556
Computer engineering

LC Class. No.: TK7874.58 / .B47 2006

Dewey Class. No.: 621.39

Scalable Hardware Verification with Symbolic Simulation /
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650 # 0 $a Computer aided design $3 253667
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650 # 0 $a Computer-Aided Engineering (CAD, CAE) and Design $3 253668
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