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On-chip communication architecturess...

Dutt, Nikil.

On-chip communication architecturessystem on chip interconnect /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	On-chip communication architecturesSudeep Pasricha, Nikil Dutt.
其他題名:	system on chip interconnect /
作者:	Pasricha, Sudeep.
其他作者:	Dutt, Nikil.
出版者:	Amsterdam ;Elsevier / Morgan Kaufmann Publishers,c2008.
面頁冊數:	xvii, 522 p. :ill. ;25 cm.
標題:	Systems on a chip.
電子資源:	An electronic book accessible through the World Wide Web; click for information
電子資源:	http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780123738929
ISBN:	9780123738929

On-chip communication architecturessystem on chip interconnect /
Pasricha, Sudeep.

On-chip communication architecturessystem on chip interconnect /[electronic resource] :Sudeep Pasricha, Nikil Dutt. - Amsterdam ;Elsevier / Morgan Kaufmann Publishers,c2008. - xvii, 522 p. :ill. ;25 cm.

Includes bibliographical references and index.

An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends.

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2008.

Mode of access: World Wide Web.

ISBN: 9780123738929

Source: 137171:137307Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

224012
Systems on a chip.
Index Terms--Genre/Form:

214472
Electronic books.

LC Class. No.: TK7895.E42 / P4 2008eb

Dewey Class. No.: 621.3815

On-chip communication architecturessystem on chip interconnect /
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300 $a xvii, 522 p. : $b ill. ; $c 25 cm.
504 $a Includes bibliographical references and index.
505 0 $a An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends.
520 $a Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years.
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