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Principles of verifiable RTL designa...

Bening, Lionel.

Principles of verifiable RTL designa functional coding style supporting verification processes in Verilog /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Principles of verifiable RTL designLionel Bening and Harry Foster.
其他題名:	a functional coding style supporting verification processes in Verilog /
作者:	Bening, Lionel.
其他作者:	Foster, Harry.
出版者:	Norwell, Mass. :Kluwer Academic Publishers,c2002.
面頁冊數:	xvii, 253 p. :ill., digital ;24 cm.
Contained By:	Springer e-books
標題:	Verilog (Computer hardware description language)
電子資源:	http://dx.doi.org/10.1007/b116517
ISBN:	9780306470165 (electronic bk.)

Principles of verifiable RTL designa functional coding style supporting verification processes in Verilog /
Bening, Lionel.

Principles of verifiable RTL designa functional coding style supporting verification processes in Verilog /[electronic resource] :Lionel Bening and Harry Foster. - Norwell, Mass. :Kluwer Academic Publishers,c2002. - xvii, 253 p. :ill., digital ;24 cm.

ISBN: 9780306470165 (electronic bk.)Subjects--Topical Terms:

182774
Verilog (Computer hardware description language)

LC Class. No.: TK7874.75 / .B47 2002

Dewey Class. No.: 621.392

Principles of verifiable RTL designa functional coding style supporting verification processes in Verilog /
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