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Model reduction for circuit simulation

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Benner, Peter.

Model reduction for circuit simulation

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Model reduction for circuit simulationedited by Peter Benner, Michael Hinze, E. Jan W. ter Maten.
其他作者:	Benner, Peter.
出版者:	Dordrecht :Springer Science+Business Media B.V.,2011.
面頁冊數:	xiii, 315 p. :ill., digital ;24 cm.
叢書名:	Lecture notes in electrical engineering,
Contained By:	Springer eBooks
標題:	Integrated circuitsComputer simulation.
電子資源:	http://dx.doi.org/10.1007/978-94-007-0089-5
ISBN:	9789400700895 (electronic bk.)

Model reduction for circuit simulation
Model reduction for circuit simulation[electronic resource] /edited by Peter Benner, Michael Hinze, E. Jan W. ter Maten. - Dordrecht :Springer Science+Business Media B.V.,2011. - xiii, 315 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.741876-1100 ;.

ISBN: 9789400700895 (electronic bk.)Subjects--Topical Terms:

455984
Integrated circuits
--Computer simulation.

LC Class. No.: TK7874 / .M63 2011

Dewey Class. No.: 621.3815

Model reduction for circuit simulation
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650 2 4 $a Appl.Mathematics/Computational Methods of Engineering. $3 273758
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700 1 $a Ter Maten, E. Jan W. $3 511672
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