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系統構裝電磁干擾抑制與模型化研究 = The Study of Elec...

國立高雄大學電機工程學系碩士班

系統構裝電磁干擾抑制與模型化研究 = The Study of Electromagnetic Interference Suppression and Modeling of System in Package

Record Type:	Language materials, printed : monographic
Paralel Title:	The Study of Electromagnetic Interference Suppression and Modeling of System in Package
Author:	許仁芳,
Secondary Intellectual Responsibility:	國立高雄大學
Place of Publication:	[高雄市]
Published:	撰者;
Year of Publication:	2014[民103]
Description:	[11], 65面圖，表 : 30公分;
Subject:	積體電路電磁相容
Subject:	IC-EMC
Online resource:	http://handle.ncl.edu.tw/11296/ndltd/80215086410988528428
Notes:	參考書目：面62-65
Notes:	104年3月25日公開
Summary:	系統電路的積體化以及高頻高速的電路設計背景下，使得電磁波輻射問題越來越嚴重。以往在抑制電磁輻射時，大多在系統端以電磁屏蔽盒或銅箔膠帶以將輻射量降低，然而由於此會使成本提升以及設計時間拉長，因此如果能在積體電路端便將電磁波輻射問題予以預先處理，將可以大幅降低成本及產品上市時間。針對上述提及之產業背景，本論文係針對積體電路中最核心的部分-積體電路構裝之電磁輻射問題提出兩項解決方法-設計輻射抑制結構以及構裝模型建立。論文中以目前市場上較常用之QFN/QFP/ BGA為構裝研究主體，針對不同打線以及各種結構變異的構裝設計進行符合IEC61967-3之近場掃描電磁干擾量測以及符合IEC62433之構裝高頻電磁模型建立，從量測結果中嘗試找出最佳之構裝設計，整理出構裝電磁干擾最佳化設計方針；且完成高頻電磁模型萃取使構裝電路可進行預先電路設計。未來將可利用此些設計的方向進而在積體電路端預先壓抑電磁輻射，即可將成本壓低並縮短產品上市之時間。 With the technological background of system integration and high-frequency, high-speed circuit design, the radiated emission by electromagnetic wave has been more serious. Generally, for the radiated emission suppression in system level, shielding box and copper coil tape are used to decrease radiation. However, these would cause cost consumption and long design time. If the problem of EMI can be pre-resolved in IC level, the cost and time-market of products can be decreased.Based on the technological background mentioned as follows, this paper proposed two solutions for analyzing IC-EMC, the first is radiation suppression structure and another is package modeling extraction. Different bonding type and different structure of QFP/QFN/BGA are designed and measured by near-field scanner in keeping with IEC61967-3. For IEC 62433 standard, the modeling with high bandwidth of package is extracted for decreasing design cycle time. From measurement results, the better EMI optimization solutions are found and broadband model are extracted to complete the fast and precise pre-design of package. In the future, EMI suppression will be done in IC level to shorten the time-market of products and complete cost down.

系統構裝電磁干擾抑制與模型化研究 = The Study of Electromagnetic Interference Suppression and Modeling of System in Package
許, 仁芳

系統構裝電磁干擾抑制與模型化研究 = The Study of Electromagnetic Interference Suppression and Modeling of System in Package / 許仁芳撰 - [高雄市] : 撰者, 2014[民103]. - [11], 65面 ; 圖，表 ; 30公分.
參考書目：面62-65104年3月25日公開.
積體電路電磁相容IC-EMC

系統構裝電磁干擾抑制與模型化研究 = The Study of Electromagnetic Interference Suppression and Modeling of System in Package
LDR:03597nam0a2200289 450 001 446548
005 20170214093119.0
009 446548
010 0 $b 精裝
010 0 $b 平裝
100 $a 20170214d2014 k y0chiy05 e
101 1 $a chi $d chi $d eng
102 $a tw
105 $a ak am 000yy
200 1 $a 系統構裝電磁干擾抑制與模型化研究 $d The Study of Electromagnetic Interference Suppression and Modeling of System in Package $z eng $f 許仁芳撰
210 $a [高雄市] $c 撰者 $d 2014[民103]
215 0 $a [11], 65面 $c 圖，表 $d 30公分
300 $a 參考書目：面62-65
300 $a 104年3月25日公開
314 $a 指導教授：吳松茂博士
328 $a 碩士論文--國立高雄大學電機工程學系碩士班
330 $a 系統電路的積體化以及高頻高速的電路設計背景下，使得電磁波輻射問題越來越嚴重。以往在抑制電磁輻射時，大多在系統端以電磁屏蔽盒或銅箔膠帶以將輻射量降低，然而由於此會使成本提升以及設計時間拉長，因此如果能在積體電路端便將電磁波輻射問題予以預先處理，將可以大幅降低成本及產品上市時間。針對上述提及之產業背景，本論文係針對積體電路中最核心的部分-積體電路構裝之電磁輻射問題提出兩項解決方法-設計輻射抑制結構以及構裝模型建立。論文中以目前市場上較常用之QFN/QFP/ BGA為構裝研究主體，針對不同打線以及各種結構變異的構裝設計進行符合IEC61967-3之近場掃描電磁干擾量測以及符合IEC62433之構裝高頻電磁模型建立，從量測結果中嘗試找出最佳之構裝設計，整理出構裝電磁干擾最佳化設計方針；且完成高頻電磁模型萃取使構裝電路可進行預先電路設計。未來將可利用此些設計的方向進而在積體電路端預先壓抑電磁輻射，即可將成本壓低並縮短產品上市之時間。 With the technological background of system integration and high-frequency, high-speed circuit design, the radiated emission by electromagnetic wave has been more serious. Generally, for the radiated emission suppression in system level, shielding box and copper coil tape are used to decrease radiation. However, these would cause cost consumption and long design time. If the problem of EMI can be pre-resolved in IC level, the cost and time-market of products can be decreased.Based on the technological background mentioned as follows, this paper proposed two solutions for analyzing IC-EMC, the first is radiation suppression structure and another is package modeling extraction. Different bonding type and different structure of QFP/QFN/BGA are designed and measured by near-field scanner in keeping with IEC61967-3. For IEC 62433 standard, the modeling with high bandwidth of package is extracted for decreasing design cycle time. From measurement results, the better EMI optimization solutions are found and broadband model are extracted to complete the fast and precise pre-design of package. In the future, EMI suppression will be done in IC level to shorten the time-market of products and complete cost down.
510 1 $a The Study of Electromagnetic Interference Suppression and Modeling of System in Package $z eng
610 0 $a 積體電路電磁相容 $a 積體電路構裝 $a 近場掃描 $a 電磁模型萃取
610 1 $a IC-EMC $a Package $a Near-field scan $a Modeling extracti
681 $a 008M/0019 $b 542201 0824 $v 2007年版
700 1 $a 許 $b 仁芳 $4 撰 $3 700854
712 0 2 $a 國立高雄大學 $b 電機工程學系碩士班 $3 166118
801 0 $a tw $b NUK $c 20150310 $g CCR
856 7 $z 電子資源 $2 http $u http://handle.ncl.edu.tw/11296/ndltd/80215086410988528428