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Design and modeling of low power VLS...

Gautam, Ruchi, (1984-)

Design and modeling of low power VLSI systems

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Design and modeling of low power VLSI systemsManoj Sharma, Ruchi Gautam, and Mohammad Ayoub Khan, editors.
其他作者:	Sharma, Manoj,
出版者:	Hershey, Pennsylvania (701 E. Chocolate Avenue, Hershey, PA 17033, USA) :IGI Global,[2016]
面頁冊數:	PDFs (386 pages) :illustrations.
標題:	Low voltage integrated circuitsDesign and construction.
電子資源:	http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-5225-0190-9
ISBN:	9781522501916$qelectronic

Design and modeling of low power VLSI systems
Design and modeling of low power VLSI systems[electronic resource] /Manoj Sharma, Ruchi Gautam, and Mohammad Ayoub Khan, editors. - Hershey, Pennsylvania (701 E. Chocolate Avenue, Hershey, PA 17033, USA) :IGI Global,[2016] - PDFs (386 pages) :illustrations.

Includes bibliographical references and index.

Low power design techniques: classical and beyond CMOS era / Mohd Samar Ansari, Shailendra Kumar Tripathi -- Low power strategies for beyond Moore's Law era: low power device technologies and materials / B. Shivalal Patro, Vandana B. -- Challenges and limitations of low power techniques: low power methodologies in analog and digital circuits / Vandana B., Patro B. S. -- Leakage minimization in CMOS VLSI circuits: a brief review / Saurabh Chaudhury, Rohit Lorenzo -- Contemporary low power design approaches / Lini Lee -- Low power VLSI circuit design using energy recovery techniques / V. S. Kanchana Bhaaskaran -- State-of-the-art master slave flip-flop designs for low power VLSI systems / Kunwar Singh, Satish Chandra Tiwari, Maneesha Gupta -- Signal-adaptive analog-to-digital converters for ULP wearable and implantable medical devices: a survey / Nabi Sertac Artan -- The design of ultra low power RF CMOS LNA in nanometer technology / Kavyashree P., Siva S. Yellampalli -- Low power arithmetic circuit design for multimedia applications / Senthil C. Pari -- Case study: system on a chip for electric stimulation / Martha Salome Lopez -- Low power design of high speed communication system using IO standard technique over 28 nm VLSI chip / Bhagwan Das, Mohammad Faiz Liew Abdullah.

Restricted to subscribers or individual electronic text purchasers.

"This book analyzes various traditional and modern low power techniques for integrated circuit design in addition to the limiting factors of existing techniques and methods for optimization, offering a research-based discussion of the technicalities involved in the VLSI hardware development process cycle"--Provided by publisher.

Mode of access: World Wide Web.

ISBN: 9781522501916$qelectronicSubjects--Topical Terms:

184466
Low voltage integrated circuits
--Design and construction.Subjects--Index Terms:

Low power benchmarking

LC Class. No.: TK7874.66 / .D47 2016e

Dewey Class. No.: 621.39/5

Design and modeling of low power VLSI systems
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260 $a Hershey, Pennsylvania (701 E. Chocolate Avenue, Hershey, PA 17033, USA) : $b IGI Global, $c [2016]
300 $a PDFs (386 pages) : $b illustrations.
504 $a Includes bibliographical references and index.
505 0 $a Low power design techniques: classical and beyond CMOS era / Mohd Samar Ansari, Shailendra Kumar Tripathi -- Low power strategies for beyond Moore's Law era: low power device technologies and materials / B. Shivalal Patro, Vandana B. -- Challenges and limitations of low power techniques: low power methodologies in analog and digital circuits / Vandana B., Patro B. S. -- Leakage minimization in CMOS VLSI circuits: a brief review / Saurabh Chaudhury, Rohit Lorenzo -- Contemporary low power design approaches / Lini Lee -- Low power VLSI circuit design using energy recovery techniques / V. S. Kanchana Bhaaskaran -- State-of-the-art master slave flip-flop designs for low power VLSI systems / Kunwar Singh, Satish Chandra Tiwari, Maneesha Gupta -- Signal-adaptive analog-to-digital converters for ULP wearable and implantable medical devices: a survey / Nabi Sertac Artan -- The design of ultra low power RF CMOS LNA in nanometer technology / Kavyashree P., Siva S. Yellampalli -- Low power arithmetic circuit design for multimedia applications / Senthil C. Pari -- Case study: system on a chip for electric stimulation / Martha Salome Lopez -- Low power design of high speed communication system using IO standard technique over 28 nm VLSI chip / Bhagwan Das, Mohammad Faiz Liew Abdullah.
506 $a Restricted to subscribers or individual electronic text purchasers.
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530 $a Also available in print.
538 $a Mode of access: World Wide Web.
588 $a Description based on title screen (IGI Global, viewed 06/18/2016).
650 0 $a Low voltage integrated circuits $x Design and construction. $3 184466
650 0 $a Integrated circuits $x Very large scale integration $x Design and construction. $3 182089
653 $a Low power benchmarking
653 $a Low power circuit design
653 $a Low power modeling
653 $a Power optimization
653 $a Routing strategies
653 $a Testing methodologies
700 1 $a Sharma, Manoj, $d 1981- $e editor. $3 752673
700 1 $a Gautam, Ruchi, $d 1984- $e editor. $3 752674
700 1 $a Khan, Mohammad Ayoub, $d 1980- $3 582035
710 2 $a IGI Global, $e publisher. $3 717658
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