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Memory System Optimizations for Cust...

Chen, Yu-Ting.

Memory System Optimizations for Customized Computing -- From Single-Chip to Datacenter.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Memory System Optimizations for Customized Computing -- From Single-Chip to Datacenter.
作者:	Chen, Yu-Ting.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, 2016
面頁冊數:	314 p.
附註:	Source: Dissertation Abstracts International, Volume: 77-09(E), Section: B.
附註:	Adviser: Jingsheng Jason Cong.
Contained By:	Dissertation Abstracts International77-09B(E).
標題:	Computer science.
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10036420
ISBN:	9781339545936

Memory System Optimizations for Customized Computing -- From Single-Chip to Datacenter.
Chen, Yu-Ting.

Memory System Optimizations for Customized Computing -- From Single-Chip to Datacenter. - Ann Arbor : ProQuest Dissertations & Theses, 2016 - 314 p.

Source: Dissertation Abstracts International, Volume: 77-09(E), Section: B.

Thesis (Ph.D.)--University of California, Los Angeles, 2016.

Energy efficiency is one of the key considerations for various systems, from handheld devices to servers in a data center. Application-specific accelerators can provide 10 - 1000X energy-efficiency improvement over general-purpose processors through customization and by exploiting the application parallelism. The design of memory system is the key to improve performance and energy efficiency for both accelerators and processors. However, even with customization and acceleration, the single-server computation power is still limited and cannot support need of large-scale data processing and analytics. Therefore, the second goal of this dissertation is to provide customization support in the in-memory cluster computing system for such big data applications. The first part of this dissertation investigates the design and optimizations of memory system. Our goal is to design a high-performance and energy-efficient memory system that supports both general-purpose processors and accelerator-rich architectures (ARAs). We proposed hybrid caches architecture and corresponding optimizations for processor caches. We also provide an optimal algorithm to synthesize the ARA memory system. In the second part of this dissertation, we focus on improving the performance of an important domain, DNA sequencing pipeline, which demands huge computation need together with big data characteristics. We adopt the in-memory cluster computing framework, Spark, to provide scalable speedup while providing hardware acceleration support in the cluster. With such system, we can reduce the time of sequence alignment process from tens of hours to 32 minutes.

ISBN: 9781339545936Subjects--Topical Terms:

199325
Computer science.

Memory System Optimizations for Customized Computing -- From Single-Chip to Datacenter.
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