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Technology mapping for LUT-based FPGA

Kania, Dariusz.

Technology mapping for LUT-based FPGA

Record Type:	Electronic resources : Monograph/item
Title/Author:	Technology mapping for LUT-based FPGAby Marcin Kubica, Adam Opara, Dariusz Kania.
Author:	Kubica, Marcin.
other author:	Opara, Adam.
Published:	Cham :Springer International Publishing :2021.
Description:	ix, 207 p. :ill. (some col.), digital ;24 cm.
Contained By:	Springer Nature eBook
Subject:	Field programmable gate arrays.
Online resource:	https://doi.org/10.1007/978-3-030-60488-2
ISBN:	9783030604882$q(electronic bk.)

Technology mapping for LUT-based FPGA
Kubica, Marcin.

Technology mapping for LUT-based FPGA[electronic resource] /by Marcin Kubica, Adam Opara, Dariusz Kania. - Cham :Springer International Publishing :2021. - ix, 207 p. :ill. (some col.), digital ;24 cm. - Lecture notes in electrical engineering,v.7131876-1100 ;. - Lecture notes in electrical engineering ;v.132..

Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks.

This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book.

ISBN: 9783030604882$q(electronic bk.)

Standard No.: 10.1007/978-3-030-60488-2doiSubjects--Topical Terms:

246658
Field programmable gate arrays.

LC Class. No.: TK7895.G36 / K83 2021

Dewey Class. No.: 621.395

Technology mapping for LUT-based FPGA
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505 0 $a Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks.
520 $a This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book.
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