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Frontiers in electronic testing ;

書目資訊

Efficient branch and bound search wi...

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Bushnell, Michael L. (1950-)

Efficient branch and bound search with application to computer-aided design /

by: Bushnell, Michael L. (1950-)

From contamination to defects, fault...

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Khare, Jitendra B.

From contamination to defects, faults, and yield loss :simulation and applications /

by: Khare, Jitendra B.

Multi-chip module test strategies /

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Zorian, Yervant.

Multi-chip module test strategies /

by: Zorian, Yervant.

Testability concepts for digital ICs...

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Beenker, F. P. M.

Testability concepts for digital ICs :the macro test approach /

by: Beenker, F. P. M.

Testing and testable design of high-...

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Chakraborty, Kanad.

Testing and testable design of high-density random-access memories /

by: Chakraborty, Kanad.

Advances in electronic testing :chal...

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Gizopoulos, Dimitris.

Advances in electronic testing :challenges and methodologies /

by: Gizopoulos, Dimitris.

Timing performance of nanometer digi...

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Champac, Victor.

Timing performance of nanometer digital circuits under process variations

by: Champac, Victor.

Soft errors in modern electronic systems

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Nicolaidis, Michael.

Soft errors in modern electronic systems

by: Nicolaidis, Michael.

A designer's guide to built-in self-test

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SpringerLink (Online service)

A designer's guide to built-in self-test

by: SpringerLink (Online service)

Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits

by: Agrawal, Vishwani D.

Boundary-scan interconnect diagnosis

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Cheung, Peter Y. K.

Boundary-scan interconnect diagnosis

by: Cheung, Peter Y. K.

Models in hardware testinglecture no...

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SpringerLink (Online service)

Models in hardware testinglecture notes of the forum in honor of Christian Landrault /

by: SpringerLink (Online service)

Power-constrained testing of VLSI ci...

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Al-Hashimi, Bashir.

Power-constrained testing of VLSI circuits

by: Al-Hashimi, Bashir.

Verification by error modeling :usin...

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Radecka, Katarzyna.

Verification by error modeling :using testing techniques in hardware verification

by: Radecka, Katarzyna.

High performance memory testingdesig...

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Adams, R. Dean.

High performance memory testingdesign principles, fault modeling, and self-test /

by: Adams, R. Dean.

Fault injection techniques and tools...

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Benso, Alfredo.

Fault injection techniques and tools for embedded systems reliability evaluation

by: Benso, Alfredo.

Emerging Nanotechnologies :Test, Def...

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SpringerLink (Online service)

Emerging Nanotechnologies :Test, Defect Tolerance, and Reliability /

by: SpringerLink (Online service)

New methods of concurrent checking

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Goessel, M.

New methods of concurrent checking

by: Goessel, M.

Oscillation-Based Test in Mixed-Sign...

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Sanchez, Gloria Huertas.

Oscillation-Based Test in Mixed-Signal Circuits

by: Sanchez, Gloria Huertas.

Fault Diagnosis of Analog Integrated Circuits /

by: Barua, Alok.

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