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Logic synthesis and verification alg...
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Hachtel, Gary D.
Logic synthesis and verification algorithms /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Logic synthesis and verification algorithms /by Gary D. Hachtel, Fabio Somenzi.
Author:
Hachtel, Gary D.
other author:
Somenzi, Fabio.
Published:
Boston :Kluwer Academic Publishers,c1996.
Description:
xxxi, 564 p. :ill. ;26 cm.
Subject:
Integrated circuitsVery large scale integration
ISBN:
0792397460 (acid-free paper) :
Logic synthesis and verification algorithms /
Hachtel, Gary D.
Logic synthesis and verification algorithms /
by Gary D. Hachtel, Fabio Somenzi. - Boston :Kluwer Academic Publishers,c1996. - xxxi, 564 p. :ill. ;26 cm.
Includes bibliographical references (p. 537-553) and index.
ISBN: 0792397460 (acid-free paper) :NT$3,470
LCCN: 96021769 Subjects--Topical Terms:
184718
Integrated circuits
--Very large scale integration
LC Class. No.: TK7874.75 / H117 1996
Dewey Class. No.: 621.39/5
Logic synthesis and verification algorithms /
LDR
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001
144528
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19970109184927.0
008
090528s1996 maua 001 0 eng
010
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96021769
020
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0792397460 (acid-free paper) :
$c
NT$3,470
035
$a
00005004
040
$a
DLC
$c
DLC
$d
DLC
050
0 0
$a
TK7874.75
$b
H117 1996
082
0 0
$2
20
$a
621.39/5
100
$a
Hachtel, Gary D.
$3
185513
245
1 0
$a
Logic synthesis and verification algorithms /
$c
by Gary D. Hachtel, Fabio Somenzi.
260
$a
Boston :
$c
c1996.
$b
Kluwer Academic Publishers,
300
$a
xxxi, 564 p. :
$b
ill. ;
$c
26 cm.
504
$a
Includes bibliographical references (p. 537-553) and index.
650
$a
Integrated circuits
$x
Very large scale integration
$x
Design
$x
Data processing.
$3
184718
650
$a
Logic design
$x
Data processing.
$3
182348
650
$a
Integrated circuits
$x
Verification.
$3
185514
650
$a
Computer-aided design.
$3
181931
700
$a
Somenzi, Fabio.
$3
185512
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320000049611
西方語文圖書區(四樓)
1圖書
一般圖書
TK7874.75 H117 1996
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1 records • Pages 1 •
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