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Analysis, design, and optimization of integrated high-current devices in high-speed and radio frequency semiconductor systems.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Analysis, design, and optimization of integrated high-current devices in high-speed and radio frequency semiconductor systems.
作者:	Ito, Choshu.
面頁冊數:	132 p.
附註:	Adviser: Robert W. Dutton.
附註:	Source: Dissertation Abstracts International, Volume: 64-05, Section: B, page: 2317.
Contained By:	Dissertation Abstracts International64-05B.
標題:	Engineering, Electronics and Electrical.
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3090614
ISBN:	0496383361

Analysis, design, and optimization of integrated high-current devices in high-speed and radio frequency semiconductor systems.
Ito, Choshu.

Analysis, design, and optimization of integrated high-current devices in high-speed and radio frequency semiconductor systems. [electronic resource] - 132 p.

Adviser: Robert W. Dutton.

Thesis (Ph.D.)--Stanford University, 2003.

Integration of large electrostatic discharge (ESD) protection devices with radio frequency (RF)/high-speed circuits requires sufficient excess current handling capabilities such that large capacitances are present in the signal path of high frequency signals. These capacitances may cause undesirable signal reflections and inefficient power transfer between the pad and the core system. This work quantifies these undesirable effects, and through the use of Smith Charts and transmission matrices, demonstrates a methodology for optimized, distributed ESD protection design which may be integrated with RF/high-speed circuits.

ISBN: 0496383361Subjects--Topical Terms:

226981
Engineering, Electronics and Electrical.

Analysis, design, and optimization of integrated high-current devices in high-speed and radio frequency semiconductor systems.
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520 # $a Integration of large electrostatic discharge (ESD) protection devices with radio frequency (RF)/high-speed circuits requires sufficient excess current handling capabilities such that large capacitances are present in the signal path of high frequency signals. These capacitances may cause undesirable signal reflections and inefficient power transfer between the pad and the core system. This work quantifies these undesirable effects, and through the use of Smith Charts and transmission matrices, demonstrates a methodology for optimized, distributed ESD protection design which may be integrated with RF/high-speed circuits.
520 # $a Requirements for available bandwidth in RF power amplifiers necessitate operation at high frequencies. The power delivery requirements for communication with the base station further require operation in the large-signal regime. However, when identical power amplifier device unit cells are replicated and integrated for increased output power, the performance of the resultant system does not scale proportionally with increasing device channel width. Various measurement and simulation results for both electrical and thermal characteristics are obtained to identify the cause of the scaling performance limits. It is demonstrated that electromagnetic coupling between the unit cells, which may be described in terms of mutual inductance, is most likely the dominant cause of this effect, and measures to cancel these coupling effects are presented. Of these measures, the most promising consists of a system with baluns to split the signal into in-phase and out-of-phase components, then alternating these signals in adjacent unit cells, thereby generating negative mutual inductance. Simulation results indicate that using this technique results in significant performance improvement.
520 # $a The integration of devices that must either sink or source high currents pose design problems that are often not well understood. The analysis and design of such devices and their surrounding impedances, operating at high frequencies, is the focus of this thesis.
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