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Advanced germanium complementary-met...
~
Chui, Chi On.
Advanced germanium complementary-metal-oxide-semiconductor technologies.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Advanced germanium complementary-metal-oxide-semiconductor technologies.
作者:
Chui, Chi On.
面頁冊數:
137 p.
附註:
Adviser: Krishna C. Saraswat.
附註:
Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4730.
Contained By:
Dissertation Abstracts International65-09B.
標題:
Engineering, Electronics and Electrical.
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3145489
ISBN:
0496043943
Advanced germanium complementary-metal-oxide-semiconductor technologies.
Chui, Chi On.
Advanced germanium complementary-metal-oxide-semiconductor technologies.
- 137 p.
Adviser: Krishna C. Saraswat.
Thesis (Ph.D.)--Stanford University, 2004.
Additionally, two techniques to form shallow junctions for Ge MOSFET source and drain applications are studied. The corresponding activation and diffusion of various p-type and n-type dopants in Ge are analyzed after either the ion implantation or solid source diffusion doping. Through monitoring the thermal stability of the out-diffused dopants, phosphorus deactivation in Ge is observed for the first time.
ISBN: 0496043943Subjects--Topical Terms:
226981
Engineering, Electronics and Electrical.
Advanced germanium complementary-metal-oxide-semiconductor technologies.
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Additionally, two techniques to form shallow junctions for Ge MOSFET source and drain applications are studied. The corresponding activation and diffusion of various p-type and n-type dopants in Ge are analyzed after either the ion implantation or solid source diffusion doping. Through monitoring the thermal stability of the out-diffused dopants, phosphorus deactivation in Ge is observed for the first time.
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Drive current saturation in scaled Si MOSFETs is fundamentally limiting the prospect of future scaling. To overcome this scaling bottleneck and allow further improvements on short-channel MOSFET drive current, Ge MOSFET channel with high carrier mobility and source injection velocity should be incorporated. However, the unstable Ge native oxide for gate insulation and field isolation, together with the high diffusivity and low solubility of n-type Ge dopants for source and drain junction formation are the two classical problems that have obstructed CMOS device realization in Ge for four decades.
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Finally, two low thermal budget processes to fabricate Ge MOSFETs are developed using the above dielectric and junction technologies. Metal gate high-kappa Ge p-MOSFETs are fabricated without exceeding 400°C that demonstrate effective hole mobility enhancement over the silicon universal mobility model. On the other hand, functional metal gate high-kappa Ge n-MOSFETs are built using an innovative self-aligned gate-last process, which could be used as a technology vehicle to expedite the evaluation of numerous novel materials integration for advanced MOSFET applications.
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In this work, three types of nanoscale gate dielectric for Ge MOS applications are investigated. The scalability and stability of native Ge oxynitrides are first examined followed by a seminal investigation and demonstration of integration of the more scalable and stable high-kappa metal oxides for Ge MOS applications. The effects of different Ge surface cleaning and passivation strategies are discussed, leading to the demonstration of sub-1.0 nm equivalent SiO 2 thickness dielectric stack on Ge.
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