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An application analysis framework fo...

Stanford University.

An application analysis framework for polymorphic chip multiprocessors.

Record Type:	Electronic resources : Monograph/item
Title/Author:	An application analysis framework for polymorphic chip multiprocessors.
Author:	Thomas, Ayodele.
Description:	171 p.
Notes:	Adviser: Oyekunle Olukotun.
Notes:	Source: Dissertation Abstracts International, Volume: 66-04, Section: B, page: 2244.
Contained By:	Dissertation Abstracts International66-04B.
Subject:	Engineering, Electronics and Electrical.
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3171711
ISBN:	0542084643

An application analysis framework for polymorphic chip multiprocessors.
Thomas, Ayodele.

An application analysis framework for polymorphic chip multiprocessors. - 171 p.

Adviser: Oyekunle Olukotun.

Thesis (Ph.D.)--Stanford University, 2005.

An emerging class of architectures, polymorphic chip multiprocessors (CMP), exploits both data and thread parallelism simultaneously in a reconfigurable chip multiprocessor. In order to maximize the efficiency of the architecture, the programmer must not only select the appropriate regions to parallelize---a problem that continues to plague even traditional parallel programming, but also determine how to configure the architecture for optimal performance. To meet the unique programming challenges posed by polymorphic architectures and minimize programmer effort, we present the design and implementation of the SAPIENT parallel analysis framework. SAPIENT is a profile-based analysis tool that facilitates the efficient manual transformation of uniprocessor applications into multilevel parallel applications that can be executed on polymorphic CMP architectures. We demonstrate how application characteristics are used to detect thread and data level parallelism in sequential applications and analyze application behavior. We further demonstrate how SAPIENT successfully estimates parallel performance and identifies the combinations of parallel regions and corresponding architecture configurations that perform optimally. However, many applications do not attain sufficient performance based solely on uniprocessor code and optimizations are often required. Therefore, we develop a technique for identifying source code optimizations and providing detailed feedback to the programmer to enable the efficient evaluation and implementation of optimizations. Consequently, programmer effort is greatly reduced by SAPIENT analysis, speeding up the manual parallelization process and increasing the number of applications that can be considered for polymorphic execution.

ISBN: 0542084643Subjects--Topical Terms:

226981
Engineering, Electronics and Electrical.

An application analysis framework for polymorphic chip multiprocessors.
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