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Germanium N-channel field effect tra...

Connelly, Daniel Joseph.

Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy.
Author:	Connelly, Daniel Joseph.
Description:	294 p.
Notes:	Adviser: Krishna Saraswat.
Notes:	Source: Dissertation Abstracts International, Volume: 66-08, Section: B, page: 4388.
Contained By:	Dissertation Abstracts International66-08B.
Subject:	Engineering, Electronics and Electrical.
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3186330
ISBN:	9780542285769

Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy.
Connelly, Daniel Joseph.

Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy. - 294 p.

Adviser: Krishna Saraswat.

Thesis (Ph.D.)--Stanford University, 2005.

Germanium offers many features such as high carrier mobilities and efficient optical absorption, that make it an attractive material for the formation of semiconductor devices. However, silicon substrates are the standard material in the semiconductor device field. Graded-alloy epitaxy can be used to form Ge-based devices on Si substrates, allowing not only the use of cheaper, larger, stronger Si (relative to Ge) as the substrate, but also offering the opportunity for the co-integration of Si and Ge based devices. Here is presented an approach to the integration of Ge MOSFETs onto a Si substrate: the use of a graded-alloy buffer layer to confine the dislocations associated with the approximate 4% lattice mismatch between Si and Ge to well below the semiconductor surface. A device-quality Ge cap is then epitaxially deposited on the buffer layer. Conventional device processing is then used to form the transistors on the cap. First, the theory and design of the graded-alloy layer is presented. Then, different methods of material analysis of Ge-Si alloys are described, with novel analytic methods presented for Rutherford Backscattering Spectroscopy and Optical Reflectance Spectroscopy. Results are applied to the refinement of the graded-alloy layer process. Diodes, capacitors, and transistors made in the Ge cap are then described and analyzed, with considerable attention given to the design of the field-effect transistor. Finally, extensions to the present technology are discussed.

ISBN: 9780542285769Subjects--Topical Terms:

226981
Engineering, Electronics and Electrical.

Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy.
LDR:02458nmm _2200253 _450 001 170763
005 20061228142239.5
008 090528s2005 eng d
020 $a 9780542285769
035 $a 00242793
040 $a UnM $c UnM
100 0 $a Connelly, Daniel Joseph. $3 244793
245 1 0 $a Germanium N-channel field effect transistors via graded alloy chemical vapor deposition epitaxy.
300 $a 294 p.
500 $a Adviser: Krishna Saraswat.
500 $a Source: Dissertation Abstracts International, Volume: 66-08, Section: B, page: 4388.
502 $a Thesis (Ph.D.)--Stanford University, 2005.
520 # $a Germanium offers many features such as high carrier mobilities and efficient optical absorption, that make it an attractive material for the formation of semiconductor devices. However, silicon substrates are the standard material in the semiconductor device field. Graded-alloy epitaxy can be used to form Ge-based devices on Si substrates, allowing not only the use of cheaper, larger, stronger Si (relative to Ge) as the substrate, but also offering the opportunity for the co-integration of Si and Ge based devices. Here is presented an approach to the integration of Ge MOSFETs onto a Si substrate: the use of a graded-alloy buffer layer to confine the dislocations associated with the approximate 4% lattice mismatch between Si and Ge to well below the semiconductor surface. A device-quality Ge cap is then epitaxially deposited on the buffer layer. Conventional device processing is then used to form the transistors on the cap. First, the theory and design of the graded-alloy layer is presented. Then, different methods of material analysis of Ge-Si alloys are described, with novel analytic methods presented for Rutherford Backscattering Spectroscopy and Optical Reflectance Spectroscopy. Results are applied to the refinement of the graded-alloy layer process. Diodes, capacitors, and transistors made in the Ge cap are then described and analyzed, with considerable attention given to the design of the field-effect transistor. Finally, extensions to the present technology are discussed.
590 $a School code: 0212.
650 # 0 $a Engineering, Electronics and Electrical. $3 226981
690 $a 0544
710 0 # $a Stanford University. $3 212607
773 0 # $g 66-08B. $t Dissertation Abstracts International
790 $a 0212
790 1 0 $a Saraswat, Krishna, $e advisor
791 $a Ph.D.
792 $a 2005
856 4 0 $u http://libsw.nuk.edu.tw:81/login?url=http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3186330 $z http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3186330