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Chip design for submicron VLSI :CMOS...
~
Uyemura, John P. (1952-)
Chip design for submicron VLSI :CMOS layout and simulation /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Chip design for submicron VLSI :John P. Uyemura.
Reminder of title:
CMOS layout and simulation /
remainder title:
CMOS layout and simulation
Author:
Uyemura, John P.
Published:
Australia :Thomson/Nelson,c2006.
Description:
xvi, 411 p. :ill. ;25 cm.
Subject:
Metal oxide semiconductors, ComplementaryDesign and construction.
ISBN:
053446629X :
Chip design for submicron VLSI :CMOS layout and simulation /
Uyemura, John P.1952-
Chip design for submicron VLSI :
CMOS layout and simulation /CMOS layout and simulationJohn P. Uyemura. - Australia :Thomson/Nelson,c2006. - xvi, 411 p. :ill. ;25 cm.
Includes bibliographical references and index.
Minimum system requirements: Windows 98SE, XP, 2000 or NT; 64 MB system RAM; Pentium or compatible CPU.
ISBN: 053446629X :NT$3234
LCCN: 2004117356Subjects--Uniform Titles:
Microwind.
Subjects--Topical Terms:
184363
Metal oxide semiconductors, Complementary
--Design and construction.
LC Class. No.: TK7871.99.M44 / U97 2006
Chip design for submicron VLSI :CMOS layout and simulation /
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CMOS layout and simulation /
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CMOS layout and simulation
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xvi, 411 p. :
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ill. ;
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25 cm.
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Includes bibliographical references and index.
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Minimum system requirements: Windows 98SE, XP, 2000 or NT; 64 MB system RAM; Pentium or compatible CPU.
630
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Microwind.
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Metal oxide semiconductors, Complementary
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Design and construction.
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184363
650
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Integrated circuits
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Very large scale integration
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Design and construction.
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182089
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西方語文圖書區(四樓)
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