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SystemVerilog for design :a guide to...

Davidmann, Simon.

SystemVerilog for design :a guide to using SystemVerilog for hardware design and modeling /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	SystemVerilog for design :by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby.
其他題名:	a guide to using SystemVerilog for hardware design and modeling /
作者:	Sutherland, Stuart.
其他作者:	Flake, Peter.
出版者:	New York, NY :Springer,c2006.
面頁冊數:	xxx, 418 p. :ill. ;25 cm.
標題:	Verilog (Computer hardware description language)
ISBN:	0387364951

SystemVerilog for design :a guide to using SystemVerilog for hardware design and modeling /
Sutherland, Stuart.

SystemVerilog for design :a guide to using SystemVerilog for hardware design and modeling /by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby. - 2nd ed. - New York, NY :Springer,c2006. - xxx, 418 p. :ill. ;25 cm.

Includes bibliographical references and index.

ISBN: 0387364951

LCCN: 2006928944Subjects--Topical Terms:

182774
Verilog (Computer hardware description language)

LC Class. No.: TK7885.7 / .S966 2006

SystemVerilog for design :a guide to using SystemVerilog for hardware design and modeling /
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245 1 0 $a SystemVerilog for design : $b a guide to using SystemVerilog for hardware design and modeling / $c by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby.
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