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Verification methodology manual for ...
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Bergeron, Janick.
Verification methodology manual for SystemVerilog /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Verification methodology manual for SystemVerilog /by Janick Bergeron ... [et al.].
other author:
Bergeron, Janick.
Published:
New York :Springer,c2006.
Description:
xvii, 503 p. :ill. ;24 cm.
Subject:
Verilog (Computer hardware description language)
ISBN:
0387255567 (e-book)
Verification methodology manual for SystemVerilog /
Verification methodology manual for SystemVerilog /
by Janick Bergeron ... [et al.]. - New York :Springer,c2006. - xvii, 503 p. :ill. ;24 cm.
Includes bibliographical references and index.
ISBN: 0387255567 (e-book)
LCCN: 2005051724Subjects--Topical Terms:
182774
Verilog (Computer hardware description language)
LC Class. No.: TK7885.7 / .V516 2006
Dewey Class. No.: 621.39/2
Verification methodology manual for SystemVerilog /
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Verification methodology manual for SystemVerilog /
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by Janick Bergeron ... [et al.].
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New York :
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c2006.
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Springer,
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xvii, 503 p. :
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ill. ;
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24 cm.
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Includes bibliographical references and index.
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Verilog (Computer hardware description language)
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Integrated circuits
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Bergeron, Janick.
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257777
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320000218042
西方語文圖書區(四樓)
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TK7885.7 V516 2006
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