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Writing Testbenches using System Verilog /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Writing Testbenches using System Verilog /by Janick Bergeron.
作者:	Bergeron, Janick.
出版者:	Boston, MA :Springer Science+Business Media, Inc.,2006.
面頁冊數:	v.: digital
標題:	Computer engineering
電子資源:	http://dx.doi.org/10.1007/0-387-31275-7
ISBN:	9780387292212 (paper)

Writing Testbenches using System Verilog /
Bergeron, Janick.

Writing Testbenches using System Verilog /[electronic resource] /by Janick Bergeron. - Boston, MA :Springer Science+Business Media, Inc.,2006. - v.: digital

ISBN: 9780387292212 (paper)Subjects--Topical Terms:

252556
Computer engineering

LC Class. No.: TK7885.7 / .B48 2006

Dewey Class. No.: 621.39/2

Writing Testbenches using System Verilog /
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650 # 0 $a Computer engineering $3 252556
650 # 0 $a System safety $3 254847
650 # 0 $a Computer aided design $3 253667
650 # 0 $a Systems engineering $3 253884
650 # 0 $a Electronic and Computer Engineering $3 252558
650 # 0 $a Quality Control, Reliability, Safety and Risk $3 254848
650 # 0 $a Engineering $3 252507
650 # 0 $a Computer-Aided Engineering (CAD, CAE) and Design $3 253668
650 # 0 $a Circuits and Systems $3 253885
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950 $a Engineering (Springer-11647; ZDB-2-ENG)

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