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SystemVerilog for Design :A Guide to Using SystemVerilog for Hardware Design and Modeling /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	SystemVerilog for Design :by Stuart Sutherland, Simon Davidmann, Peter Flake.
其他題名:	A Guide to Using SystemVerilog for Hardware Design and Modeling /
作者:	Sutherland, Stuart.
其他作者:	Davidmann, Simon.
出版者:	Boston, MA :Springer Science+Business Media, LLC,2006.
面頁冊數:	v.: digital
標題:	Computer Hardware
電子資源:	http://dx.doi.org/10.1007/0-387-36495-1
ISBN:	9780387333991 (paper)

SystemVerilog for Design :A Guide to Using SystemVerilog for Hardware Design and Modeling /
Sutherland, Stuart.

SystemVerilog for Design :A Guide to Using SystemVerilog for Hardware Design and Modeling /[electronic resource] :by Stuart Sutherland, Simon Davidmann, Peter Flake. - Second Edition. - Boston, MA :Springer Science+Business Media, LLC,2006. - v.: digital

ISBN: 9780387333991 (paper)Subjects--Topical Terms:

253723
Computer Hardware

LC Class. No.: TK7885.7 / .S875 2006

Dewey Class. No.: 621.381

SystemVerilog for Design :A Guide to Using SystemVerilog for Hardware Design and Modeling /
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