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Integrated circuit and system design...

(1998 :)

Integrated circuit and system designpower and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers /

Record Type:	Electronic resources : Monograph/item
Title/Author:	Integrated circuit and system designLars Svensson, Jose Monteiro (eds.)
Reminder of title:	power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers /
other author:	Svensson, Lars.
corporate name:
Published:	Berlin, Heidelberg :Springer Berlin Heidelberg,2009.
Description:	xiii, 462 p. :ill., digital ;24 cm.
Series:	Lecture notes in computer science,
Contained By:	Springer eBooks
Subject:	Integrated circuitsCongresses.Very large scale integration
Online resource:	http://dx.doi.org/10.1007/978-3-540-95948-9
ISBN:	9783540959489 (electronic bk.)

Integrated circuit and system designpower and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers /
Integrated circuit and system designpower and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers /[electronic resource] :Lars Svensson, Jose Monteiro (eds.) - Berlin, Heidelberg :Springer Berlin Heidelberg,2009. - xiii, 462 p. :ill., digital ;24 cm. - Lecture notes in computer science,53490302-9743 ;.

ISBN: 9783540959489 (electronic bk.)Subjects--Topical Terms:

436461
Integrated circuits
--Very large scale integration--Congresses.

Dewey Class. No.: 621.395

Integrated circuit and system designpower and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers /
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245 1 0 $a Integrated circuit and system design $h [electronic resource] : $b power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers / $c Lars Svensson, Jose Monteiro (eds.)
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650 2 4 $a Circuits and Systems. $3 274416
650 2 4 $a System Performance and Evaluation. $3 273898
650 2 4 $a Logic Design. $3 276275
650 2 4 $a Memory Structures. $3 274440
650 2 4 $a Processor Architectures. $3 274498
650 2 4 $a Arithmetic and Logic Structures. $3 276274
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700 1 $a Monteiro, Jose. $3 339093
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