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System-On-A-Chip verificationmethodo...

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Paterson, Peter.

System-On-A-Chip verificationmethodology and techniques /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	System-On-A-Chip verificationPrakash Rashinkar, Peter Paterson, Leena Singh.
其他題名:	methodology and techniques /
作者:	Rashinkar, Prakash.
其他作者:	Paterson, Peter.
出版者:	Boston, MA :Kluwer Academic Publishers,c2002.
面頁冊數:	xx, 372 p. :ill., digital ;25 cm.
Contained By:	Springer e-books
標題:	Electronic digital computersDesign and construction.
電子資源:	http://dx.doi.org/10.1007/b116428
ISBN:	9780306469954 (electronic bk.)

System-On-A-Chip verificationmethodology and techniques /
Rashinkar, Prakash.

System-On-A-Chip verificationmethodology and techniques /[electronic resource] :Prakash Rashinkar, Peter Paterson, Leena Singh. - Boston, MA :Kluwer Academic Publishers,c2002. - xx, 372 p. :ill., digital ;25 cm.

ISBN: 9780306469954 (electronic bk.)Subjects--Topical Terms:

190470
Electronic digital computers
--Design and construction.

LC Class. No.: QA76.9.S88 / R37 2002

Dewey Class. No.: 621.395

System-On-A-Chip verificationmethodology and techniques /
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