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System-On-A-Chip verificationmethodo...

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Paterson, Peter.

System-On-A-Chip verificationmethodology and techniques /

Record Type:	Electronic resources : Monograph/item
Title/Author:	System-On-A-Chip verificationPrakash Rashinkar, Peter Paterson, Leena Singh.
Reminder of title:	methodology and techniques /
Author:	Rashinkar, Prakash.
other author:	Paterson, Peter.
Published:	Boston, MA :Kluwer Academic Publishers,c2002.
Description:	xx, 372 p. :ill., digital ;25 cm.
Contained By:	Springer e-books
Subject:	Electronic digital computersDesign and construction.
Online resource:	http://dx.doi.org/10.1007/b116428
ISBN:	9780306469954 (electronic bk.)

System-On-A-Chip verificationmethodology and techniques /
Rashinkar, Prakash.

System-On-A-Chip verificationmethodology and techniques /[electronic resource] :Prakash Rashinkar, Peter Paterson, Leena Singh. - Boston, MA :Kluwer Academic Publishers,c2002. - xx, 372 p. :ill., digital ;25 cm.

ISBN: 9780306469954 (electronic bk.)Subjects--Topical Terms:

190470
Electronic digital computers
--Design and construction.

LC Class. No.: QA76.9.S88 / R37 2002

Dewey Class. No.: 621.395

System-On-A-Chip verificationmethodology and techniques /
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020 $a 9780306469954 (electronic bk.)
020 $a 9780792372790 (paper)
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100 1 $a Rashinkar, Prakash. $3 470083
245 1 0 $a System-On-A-Chip verification $h [electronic resource] : $b methodology and techniques / $c Prakash Rashinkar, Peter Paterson, Leena Singh.
260 $a Boston, MA : $b Kluwer Academic Publishers, $c c2002.
300 $a xx, 372 p. : $b ill., digital ; $c 25 cm.
650 0 $a Electronic digital computers $x Design and construction. $3 190470
650 0 $a System design. $3 182170
650 0 $a Computer software $x Development. $3 184751
700 1 $a Paterson, Peter. $3 470085
700 1 $a Singh, Leena. $3 470084
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856 4 0 $u http://dx.doi.org/10.1007/b116428
950 $a Computer Science

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EB QA76.9.S88 R37 2002 c2002.

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http://dx.doi.org/10.1007/b116428

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