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應用田口方法改善覆晶封裝碑立問題之研究 = The Study of I...
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國立高雄大學電機工程學系--先進電子構裝技術產業研發碩士專班
應用田口方法改善覆晶封裝碑立問題之研究 = The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
Record Type:
Language materials, printed : monographic
Paralel Title:
The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
Author:
莊文源,
Secondary Intellectual Responsibility:
國立高雄大學
Place of Publication:
[高雄市]
Published:
撰者;
Year of Publication:
民99[2010]
Description:
60面圖,表 : 30公分;
Subject:
表面粘著技術
Subject:
Surface Mount Technology
Online resource:
http://handle.ncl.edu.tw/11296/ndltd/89895431960300162287
Summary:
本研究所探討的是針對目前IC封裝中的覆晶產品結合表面黏著技術所產生被動元件碑立問題,利用田口方法分析影響的主要因子與最佳水準組合,並經驗證實驗得到較薄的鋼板厚度搭配較小的錫膏顆粒較能夠有完整的印刷形狀,並對置件後被動元件置放也較穩定。 This study is focused on solving the tombstone issue of surface mount technology in current flip chip assembly process. Taguchi methodology is used to get the optimal design and is verified by experiments. The result concludes that the thinner stencil thickness and the smaller solder paste particle have stable performance in the solder printing shape and the placement.
應用田口方法改善覆晶封裝碑立問題之研究 = The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
莊, 文源
應用田口方法改善覆晶封裝碑立問題之研究
= The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method / 莊文源撰 - [高雄市] : 撰者, 民99[2010]. - 60面 ; 圖,表 ; 30公分.
參考書目:面.
表面粘著技術Surface Mount Technology
應用田口方法改善覆晶封裝碑立問題之研究 = The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
LDR
:01892nam0a2200277 450
001
273003
005
20220511113700.0
009
273003
010
0
$b
精裝
010
0
$b
平裝
100
$a
20101220y2010 k y0chiy05 e
101
1
$a
chi
$d
chi
$d
eng
102
$a
tw
105
$a
ak am 000yy
200
1
$a
應用田口方法改善覆晶封裝碑立問題之研究
$d
The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
$f
莊文源撰
210
$a
[高雄市]
$c
撰者
$d
民99[2010]
215
0
$a
60面
$c
圖,表
$d
30公分
314
$a
指導教授:郭馨徽博士
320
$a
參考書目:面
328
$a
碩士論文--國立高雄大學電機工程學系--先進電子構裝技術產業研發碩士專班
330
$a
本研究所探討的是針對目前IC封裝中的覆晶產品結合表面黏著技術所產生被動元件碑立問題,利用田口方法分析影響的主要因子與最佳水準組合,並經驗證實驗得到較薄的鋼板厚度搭配較小的錫膏顆粒較能夠有完整的印刷形狀,並對置件後被動元件置放也較穩定。 This study is focused on solving the tombstone issue of surface mount technology in current flip chip assembly process. Taguchi methodology is used to get the optimal design and is verified by experiments. The result concludes that the thinner stencil thickness and the smaller solder paste particle have stable performance in the solder printing shape and the placement.
510
1
$a
The Study of Improvement of Tombstone in Flip Chip Package with Taguchi Method
610
# 0
$a
表面粘著技術
$a
覆晶封裝
$a
碑立
$a
田口方法
610
# 1
$a
Surface Mount Technology
$a
Flip Chip Package
$a
Tombstone
$a
Taguchi Method
681
$a
008M/0019
$b
542201 4403.1
$v
2007年版
700
1
$a
莊
$b
文源
$4
撰
$3
483148
712
0 2
$a
國立高雄大學
$b
電機工程學系--先進電子構裝技術產業研發碩士專班
$3
170852
801
0
$a
tw
$b
國立高雄大學
$c
20101227
$g
CCR
856
7 #
$z
電子資源
$2
http
$u
http://handle.ncl.edu.tw/11296/ndltd/89895431960300162287
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http://handle.ncl.edu.tw/11296/ndltd/89895431960300162287
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