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Analysis and design of resilient VLS...
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Garg, Rajesh.
Analysis and design of resilient VLSI circuitsmitigating soft errors and process variations /
Record Type:
Electronic resources : Monograph/item
Title/Author:
Analysis and design of resilient VLSI circuitsby Rajesh Garg, Sunil P. Khatri.
Reminder of title:
mitigating soft errors and process variations /
Author:
Garg, Rajesh.
other author:
Khatri, Sunil P.
Published:
Boston, MA :Springer-Verlag US,2010.
Description:
xxiii, 212 p. :ill., digital ;25 cm.
Contained By:
Springer eBooks
Subject:
Integrated circuitsVery large scale integration.
Online resource:
http://dx.doi.org/10.1007/978-1-4419-0931-2
ISBN:
9781441909312 (electronic bk.)
Analysis and design of resilient VLSI circuitsmitigating soft errors and process variations /
Garg, Rajesh.
Analysis and design of resilient VLSI circuits
mitigating soft errors and process variations /[electronic resource] :by Rajesh Garg, Sunil P. Khatri. - Boston, MA :Springer-Verlag US,2010. - xxiii, 212 p. :ill., digital ;25 cm.
ISBN: 9781441909312 (electronic bk.)Subjects--Topical Terms:
180020
Integrated circuits
--Very large scale integration.
LC Class. No.: TK7874.75 / .G37 2010
Dewey Class. No.: 621.395
Analysis and design of resilient VLSI circuitsmitigating soft errors and process variations /
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Analysis and design of resilient VLSI circuits
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mitigating soft errors and process variations /
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by Rajesh Garg, Sunil P. Khatri.
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25 cm.
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EB TK7874.75 .G37 2010
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http://dx.doi.org/10.1007/978-1-4419-0931-2
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