國立高雄大學圖資館 |

語系: 繁體中文

說明(常見問題)

圖資館首頁

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

The gm/ID Methodology, a sizing tool...

Jespers, Paul.

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsby Paul Jespers.
其他題名:	the semi-empirical and compact model approaches /
作者:	Jespers, Paul.
出版者:	Boston, MA :Springer Science+Business Media, LLC,2010.
面頁冊數:	xvi, 171 p. :ill., digital ;24 cm.
叢書名:	Analog circuits and signal processing
Contained By:	Springer eBooks
標題:	Metal oxide semiconductors, ComplementaryDesign and construction.
電子資源:	http://dx.doi.org/10.1007/978-0-387-47101-3
ISBN:	9780387471013 (electronic bk.)

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches /
Jespers, Paul.

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches /[electronic resource] :by Paul Jespers. - Boston, MA :Springer Science+Business Media, LLC,2010. - xvi, 171 p. :ill., digital ;24 cm. - Analog circuits and signal processing.

ISBN: 9780387471013 (electronic bk.)Subjects--Topical Terms:

184363
Metal oxide semiconductors, Complementary
--Design and construction.

LC Class. No.: TK7871.99.M44 / J47 2010

Dewey Class. No.: 621.3815

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches /
LDR:00881nmm 2200241 a 4500 001 274338
003 Springer
005 20101126112631.0
006 m d
007 cr nn 008maaau
008 101221s2010 mau s j eng d
020 $a 9780387471013 (electronic bk.)
020 $a 9780387471006 (paper)
035 $a 978-0-387-47100-6
050 0 4 $a TK7871.99.M44 $b J47 2010
082 0 4 $a 621.3815 $2 22
090 $a TK7871.99.M44 $b J58 2010
100 1 $a Jespers, Paul. $3 485493
245 1 4 $a The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits $h [electronic resource] : $b the semi-empirical and compact model approaches / $c by Paul Jespers.
260 $a Boston, MA : $b Springer Science+Business Media, LLC, $c 2010.
300 $a xvi, 171 p. : $b ill., digital ; $c 24 cm.
440 0 $a Analog circuits and signal processing
650 0 $a Metal oxide semiconductors, Complementary $x Design and construction. $3 184363
650 0 $a Low voltage integrated circuits $x Design and construction. $3 184466
650 0 $a Linear integrated circuits $x Design and construction. $3 209150
650 1 4 $a Engineering. $3 210888
650 2 4 $a Circuits and Systems. $3 274416
650 2 4 $a Processor Architectures. $3 274498
650 2 4 $a Solid State Physics. $3 376486
650 2 4 $a Spectroscopy and Microscopy. $3 376485
710 2 $a SpringerLink (Online service) $3 273601
773 0 $t Springer eBooks
856 4 0 $u http://dx.doi.org/10.1007/978-0-387-47101-3
950 $a Engineering (Springer-11647)