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RF receiver front-ends in deep sub-m...

The University of Texas at Dallas.

RF receiver front-ends in deep sub-micron CMOS for mobile terminal.

Record Type:	Electronic resources : Monograph/item
Title/Author:	RF receiver front-ends in deep sub-micron CMOS for mobile terminal.
Author:	Yanduru, Naveen Krishna.
Description:	220 p.
Notes:	Source: Dissertation Abstracts International, Volume: 72-07, Section: B, page: .
Notes:	Advisers: Poras T. Balsara; Ranjit Gharpurey.
Contained By:	Dissertation Abstracts International72-07B.
Subject:	Engineering, Electronics and Electrical.
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3455606
ISBN:	9781124635958

RF receiver front-ends in deep sub-micron CMOS for mobile terminal.
Yanduru, Naveen Krishna.

RF receiver front-ends in deep sub-micron CMOS for mobile terminal. - 220 p.

Source: Dissertation Abstracts International, Volume: 72-07, Section: B, page: .

Thesis (Ph.D.)--The University of Texas at Dallas, 2011.

RF receiver front-end design for the mobile terminals has become a challenging task. The need to share the receiver hardware over multiple RF frequency bands and RF standards; the drive toward reduction in external components and filters; low power consumption targets; deep sub-micron CMOS implementation for SoC applications; and high dynamic range requirements have created an imposing design challenge for the RF receiver front-end. In this research we have taken an objective look at this design challenge and addressed it at various levels.

ISBN: 9781124635958Subjects--Topical Terms:

226981
Engineering, Electronics and Electrical.

RF receiver front-ends in deep sub-micron CMOS for mobile terminal.
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245 1 0 $a RF receiver front-ends in deep sub-micron CMOS for mobile terminal.
300 $a 220 p.
500 $a Source: Dissertation Abstracts International, Volume: 72-07, Section: B, page: .
500 $a Advisers: Poras T. Balsara; Ranjit Gharpurey.
502 $a Thesis (Ph.D.)--The University of Texas at Dallas, 2011.
520 $a RF receiver front-end design for the mobile terminals has become a challenging task. The need to share the receiver hardware over multiple RF frequency bands and RF standards; the drive toward reduction in external components and filters; low power consumption targets; deep sub-micron CMOS implementation for SoC applications; and high dynamic range requirements have created an imposing design challenge for the RF receiver front-end. In this research we have taken an objective look at this design challenge and addressed it at various levels.
520 $a In this research, multiple RF receiver front-ends in various deep sub-micron CMOS process technologies have been designed for various cellular standards. The designs utilize different architectures in order to assess the trade-offs involved with architecture selection. Innovative circuit design techniques and a novel compensation/calibration scheme have been presented.
520 $a Comprehensive system analysis of W-CDMA using modulated signals has been detailed in this work to illustrate the significance of system level analysis in achieving optimized RF receiver front-end design. Most notably, high dynamic range multi-standard capable designs in deep sub-micron CMOS that achieved high levels of integration by eliminating inter-stage SAW filters and sometimes external LNAs that have been otherwise used in state-of-the-art designs are demonstrated in this research.
590 $a School code: 0382.
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790 1 0 $a Gharpurey, Ranjit, $e advisor
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