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焊線條件對打線製程承受功率的影響因素探討 = The study of ...

國立高雄大學電機工程學系碩士班

焊線條件對打線製程承受功率的影響因素探討 = The study of wire parameters of power specification in wire bend process because

Record Type:	Language materials, printed : monographic
Paralel Title:	The study of wire parameters of power specification in wire bend process because
Author:	陳人源,
Secondary Intellectual Responsibility:	國立高雄大學
Place of Publication:	[高雄市]
Published:	撰者;
Year of Publication:	2014[民103]
Description:	59面圖，表 : 30公分;
Subject:	覆晶封裝
Subject:	Flip Chip
Online resource:	http://handle.ncl.edu.tw/11296/ndltd/78791694036241901494
Notes:	參考書目：面46-48
Notes:	103年12月16日公開
Summary:	除了覆晶封裝(Flip Chip)打線(wire bonding)接合對於整個封裝製程來說是一道不可或缺的製程，雖然針對封裝元件的電氣特性需求及成本考量，目前線材的種類除了傳統的鋁(Al)線、金(Au)線及銀(Ag)線之外還有最新的銅(Cu)線，對於打線的研究多注重線與接線墊之機械接著，然而打線最終的目的是達到元件的電氣規格如阻抗及承載電流，因應目前IC小尺寸大功率的發展趨勢，高功率IC打線容易因為電流過大而燒毀，本論文以基本電學原理為出發，探討打線的最佳方式與組合的實驗驗證，以經濟的方法提升打線的電流承載性能，結果究發現縮短打線的距離可提高電流承載能力，另外，單點多線比單線可以耐提高耐電流承載。 Wire bonding is a key process in most IC packaging except for flip chip package. There are variety of wire materials such as alumina wire, gold wire, silver wire, and recently developed copper wire to meet with the requirements for mechanical adhesion, electrical characteristics and cost. As known that IC packages are more versatile and high power specification. Since, most studies were focused on the mechanical adhesion issues in wire bonding. This thesis is focused on the study of the optimization of the electrical properties of wire bonding based on fundamental electro-magnetic principle. The experiments results of I-V testing show that by shortening the wire length or by parallel wires bonding can effectively increase the current loading of wire bonding. These results of wire bonding optimization approach can be helpful to promote the efficiency of wire bonding for high power electronics packages.

焊線條件對打線製程承受功率的影響因素探討 = The study of wire parameters of power specification in wire bend process because
陳, 人源

焊線條件對打線製程承受功率的影響因素探討 = The study of wire parameters of power specification in wire bend process because / 陳人源撰 - [高雄市] : 撰者, 2014[民103]. - 59面 ; 圖，表 ; 30公分.
參考書目：面46-48103年12月16日公開.
覆晶封裝Flip Chip

焊線條件對打線製程承受功率的影響因素探討 = The study of wire parameters of power specification in wire bend process because
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314 $a 指導教授：施明昌博士
328 $a 碩士論文--國立高雄大學電機工程學系碩士班
330 $a 除了覆晶封裝(Flip Chip)打線(wire bonding)接合對於整個封裝製程來說是一道不可或缺的製程，雖然針對封裝元件的電氣特性需求及成本考量，目前線材的種類除了傳統的鋁(Al)線、金(Au)線及銀(Ag)線之外還有最新的銅(Cu)線，對於打線的研究多注重線與接線墊之機械接著，然而打線最終的目的是達到元件的電氣規格如阻抗及承載電流，因應目前IC小尺寸大功率的發展趨勢，高功率IC打線容易因為電流過大而燒毀，本論文以基本電學原理為出發，探討打線的最佳方式與組合的實驗驗證，以經濟的方法提升打線的電流承載性能，結果究發現縮短打線的距離可提高電流承載能力，另外，單點多線比單線可以耐提高耐電流承載。 Wire bonding is a key process in most IC packaging except for flip chip package. There are variety of wire materials such as alumina wire, gold wire, silver wire, and recently developed copper wire to meet with the requirements for mechanical adhesion, electrical characteristics and cost. As known that IC packages are more versatile and high power specification. Since, most studies were focused on the mechanical adhesion issues in wire bonding. This thesis is focused on the study of the optimization of the electrical properties of wire bonding based on fundamental electro-magnetic principle. The experiments results of I-V testing show that by shortening the wire length or by parallel wires bonding can effectively increase the current loading of wire bonding. These results of wire bonding optimization approach can be helpful to promote the efficiency of wire bonding for high power electronics packages.
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