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Low power interconnect design

Saini, Sandeep.

Low power interconnect design

Record Type:	Electronic resources : Monograph/item
Title/Author:	Low power interconnect designby Sandeep Saini.
Author:	Saini, Sandeep.
Published:	New York, NY :Springer New York :2015.
Description:	xvii, 152 p. :ill. (some col.), digital ;24 cm.
Contained By:	Springer eBooks
Subject:	Interconnects (Integrated circuit technology)Design.
Online resource:	http://dx.doi.org/10.1007/978-1-4614-1323-3
ISBN:	9781461413233 (electronic bk.)

Low power interconnect design
Saini, Sandeep.

Low power interconnect design[electronic resource] /by Sandeep Saini. - New York, NY :Springer New York :2015. - xvii, 152 p. :ill. (some col.), digital ;24 cm.

Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.

ISBN: 9781461413233 (electronic bk.)

Standard No.: 10.1007/978-1-4614-1323-3doiSubjects--Topical Terms:

712016
Interconnects (Integrated circuit technology)
--Design.

LC Class. No.: TK7874.53

Dewey Class. No.: 621.3815

Low power interconnect design
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245 1 0 $a Low power interconnect design $h [electronic resource] / $c by Sandeep Saini.
260 $a New York, NY : $b Springer New York : $b Imprint: Springer, $c 2015.
300 $a xvii, 152 p. : $b ill. (some col.), digital ; $c 24 cm.
505 0 $a Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.
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650 1 4 $a Engineering. $3 210888
650 2 4 $a Circuits and Systems. $3 274416
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 274412
650 2 4 $a Processor Architectures. $3 274498
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