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From variability tolerance to approx...
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Benini, Luca.
From variability tolerance to approximate computing in parallel integrated architectures and accelerators
Record Type:
Electronic resources : Monograph/item
Title/Author:
From variability tolerance to approximate computing in parallel integrated architectures and acceleratorsby Abbas Rahimi, Luca Benini, Rajesh K. Gupta.
Author:
Rahimi, Abbas.
other author:
Benini, Luca.
Published:
Cham :Springer International Publishing :2017.
Description:
xv, 197 p. :ill. (some col.), digital ;24 cm.
Contained By:
Springer eBooks
Subject:
Computer architecture.
Online resource:
http://dx.doi.org/10.1007/978-3-319-53768-9
ISBN:
9783319537689$q(electronic bk.)
From variability tolerance to approximate computing in parallel integrated architectures and accelerators
Rahimi, Abbas.
From variability tolerance to approximate computing in parallel integrated architectures and accelerators
[electronic resource] /by Abbas Rahimi, Luca Benini, Rajesh K. Gupta. - Cham :Springer International Publishing :2017. - xv, 197 p. :ill. (some col.), digital ;24 cm.
Introduction -- Part 1. Predicting and Preventing Errors -- Instruction-Level Tolerance -- Sequence-Level Tolerance -- Procedure-Level Tolerance -- Kernel-Level Tolerance -- Hierarchically Focused Guardbanding -- Part 2. Detecting and Correcting Errors -- Work-Unit Tolerance -- Memristive-Based Associative Memory for Error Recovery -- Part 3. Accepting Errors -- Accuracy-Configurable OpenMP -- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration -- Memristive-Based Associative Memory for Approximate Computational Reuse -- Spatial and Temporal Memoization -- Outlook.
ISBN: 9783319537689$q(electronic bk.)
Standard No.: 10.1007/978-3-319-53768-9doiSubjects--Topical Terms:
183006
Computer architecture.
LC Class. No.: QA76.9.A73
Dewey Class. No.: 004.22
From variability tolerance to approximate computing in parallel integrated architectures and accelerators
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Introduction -- Part 1. Predicting and Preventing Errors -- Instruction-Level Tolerance -- Sequence-Level Tolerance -- Procedure-Level Tolerance -- Kernel-Level Tolerance -- Hierarchically Focused Guardbanding -- Part 2. Detecting and Correcting Errors -- Work-Unit Tolerance -- Memristive-Based Associative Memory for Error Recovery -- Part 3. Accepting Errors -- Accuracy-Configurable OpenMP -- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration -- Memristive-Based Associative Memory for Approximate Computational Reuse -- Spatial and Temporal Memoization -- Outlook.
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EB QA76.9.A73 R147 2017
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http://dx.doi.org/10.1007/978-3-319-53768-9
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