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System level design from HW/SW to me...

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System level design from HW/SW to memory for embedded systems5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguacu, Brazil, November 3-6, 2015 : proceedings /

Record Type:	Electronic resources : Monograph/item
Title/Author:	System level design from HW/SW to memory for embedded systemsedited by Marcelo Gotz ... [et al.].
Reminder of title:	5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguacu, Brazil, November 3-6, 2015 : proceedings /
remainder title:	IESS 2015
other author:	Gotz, Marcelo.
corporate name:
Published:	Cham :Springer International Publishing :2017.
Description:	xii, 231 p. :ill., digital ;24 cm.
Contained By:	Springer eBooks
Subject:	Embedded computer systemsCongresses.
Online resource:	http://dx.doi.org/10.1007/978-3-319-90023-0
ISBN:	9783319900230$q(electronic bk.)

System level design from HW/SW to memory for embedded systems5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguacu, Brazil, November 3-6, 2015 : proceedings /
System level design from HW/SW to memory for embedded systems5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguacu, Brazil, November 3-6, 2015 : proceedings /[electronic resource] :IESS 2015edited by Marcelo Gotz ... [et al.]. - Cham :Springer International Publishing :2017. - xii, 231 p. :ill., digital ;24 cm. - IFIP advances in information and communication technology,5231868-4238 ;. - IFIP advances in information and communication technology ;370..

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguacu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.

ISBN: 9783319900230$q(electronic bk.)

Standard No.: 10.1007/978-3-319-90023-0doiSubjects--Topical Terms:

384523
Embedded computer systems
--Congresses.

LC Class. No.: TK7895.E42

Dewey Class. No.: 006.22

System level design from HW/SW to memory for embedded systems5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguacu, Brazil, November 3-6, 2015 : proceedings /
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