Language:
English
繁體中文
Help
圖資館首頁
Login
Back
Switch To:
Labeled
|
MARC Mode
|
ISBD
ASIC/SoC functional design verificat...
~
Mehta, Ashok B.
ASIC/SoC functional design verificationa comprehensive guide to technologies and methodologies /
Record Type:
Electronic resources : Monograph/item
Title/Author:
ASIC/SoC functional design verificationby Ashok B. Mehta.
Reminder of title:
a comprehensive guide to technologies and methodologies /
Author:
Mehta, Ashok B.
Published:
Cham :Springer International Publishing :2018.
Description:
xxxi, 328 p. :ill., digital ;24 cm.
Contained By:
Springer eBooks
Subject:
Application-specific integrated circuitsDesign.
Online resource:
http://dx.doi.org/10.1007/978-3-319-59418-7
ISBN:
9783319594187$q(electronic bk.)
ASIC/SoC functional design verificationa comprehensive guide to technologies and methodologies /
Mehta, Ashok B.
ASIC/SoC functional design verification
a comprehensive guide to technologies and methodologies /[electronic resource] :by Ashok B. Mehta. - Cham :Springer International Publishing :2018. - xxxi, 328 p. :ill., digital ;24 cm.
Chapter 1.Introduction -- Chapter 2.Functional Verification- Challeenges and Solution -- Chapter 3.SystemVerilog Paradigm -- Chapter 4. UVM -- Chapter 5.CRV -- Chapter 6.SVA -- Chapter 7.SFC -- Chapter 8.CDC -- Chapter 9.Low Power Verification -- Chapter 10. Static Verification -- Chapter 11.ESL -- Chapter 12. Hardware/Software Co-verification -- Chapter 13 -- Analog Mixed Signals Verification -- Chapter 14 -- SOC Interconnect Verification -- Chapter 15. The Complete Product Design Lifecycle -- Chapter 16. Voice Over IP -- Chapter 17. Cache Memory Subsystem Verification: UVM Agent Based -- Chapter 18. Cache Memory Subsystem Verification: ISS Based.
This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon The author outlines all of the verification sub-fields at a high level, with just enough depth to allow a manager/decision maker or an engineer to grasp the field which can then be pursued in detail with the provided references. He describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
ISBN: 9783319594187$q(electronic bk.)
Standard No.: 10.1007/978-3-319-59418-7doiSubjects--Topical Terms:
773123
Application-specific integrated circuits
--Design.
LC Class. No.: TK7874.6
Dewey Class. No.: 621.3815
ASIC/SoC functional design verificationa comprehensive guide to technologies and methodologies /
LDR
:02735nmm a2200313 a 4500
001
526560
003
DE-He213
005
20170628085555.0
006
m d
007
cr nn 008maaau
008
181012s2018 gw s 0 eng d
020
$a
9783319594187$q(electronic bk.)
020
$a
9783319594170$q(paper)
024
7
$a
10.1007/978-3-319-59418-7
$2
doi
035
$a
978-3-319-59418-7
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7874.6
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
082
0 4
$a
621.3815
$2
23
090
$a
TK7874.6
$b
.M498 2018
100
1
$a
Mehta, Ashok B.
$3
674857
245
1 0
$a
ASIC/SoC functional design verification
$h
[electronic resource] :
$b
a comprehensive guide to technologies and methodologies /
$c
by Ashok B. Mehta.
260
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2018.
300
$a
xxxi, 328 p. :
$b
ill., digital ;
$c
24 cm.
505
0
$a
Chapter 1.Introduction -- Chapter 2.Functional Verification- Challeenges and Solution -- Chapter 3.SystemVerilog Paradigm -- Chapter 4. UVM -- Chapter 5.CRV -- Chapter 6.SVA -- Chapter 7.SFC -- Chapter 8.CDC -- Chapter 9.Low Power Verification -- Chapter 10. Static Verification -- Chapter 11.ESL -- Chapter 12. Hardware/Software Co-verification -- Chapter 13 -- Analog Mixed Signals Verification -- Chapter 14 -- SOC Interconnect Verification -- Chapter 15. The Complete Product Design Lifecycle -- Chapter 16. Voice Over IP -- Chapter 17. Cache Memory Subsystem Verification: UVM Agent Based -- Chapter 18. Cache Memory Subsystem Verification: ISS Based.
520
$a
This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon The author outlines all of the verification sub-fields at a high level, with just enough depth to allow a manager/decision maker or an engineer to grasp the field which can then be pursued in detail with the provided references. He describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
650
0
$a
Application-specific integrated circuits
$x
Design.
$3
773123
650
0
$a
Systems on a chip
$x
Design.
$3
456731
650
0
$a
SystemVerilog (Computer hardware description language)
$3
670683
650
1 4
$a
Engineering.
$3
210888
650
2 4
$a
Circuits and Systems.
$3
274416
650
2 4
$a
Processor Architectures.
$3
274498
650
2 4
$a
Logic Design.
$3
276275
710
2
$a
SpringerLink (Online service)
$3
273601
773
0
$t
Springer eBooks
856
4 0
$u
http://dx.doi.org/10.1007/978-3-319-59418-7
950
$a
Engineering (Springer-11647)
based on 0 review(s)
ALL
電子館藏
Items
1 records • Pages 1 •
1
Inventory Number
Location Name
Item Class
Material type
Call number
Usage Class
Loan Status
No. of reservations
Opac note
Attachments
000000149279
電子館藏
1圖書
電子書
EB TK7874.6 .M498 2018 2018
一般使用(Normal)
On shelf
0
1 records • Pages 1 •
1
Multimedia
Multimedia file
http://dx.doi.org/10.1007/978-3-319-59418-7
Reviews
Add a review
and share your thoughts with other readers
Export
pickup library
Processing
...
Change password
Login