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High-resolution and high-speed integ...
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Li, Fule.
High-resolution and high-speed integrated CMOS AD converters for low-power applications
Record Type:
Electronic resources : Monograph/item
Title/Author:
High-resolution and high-speed integrated CMOS AD converters for low-power applicationsby Weitao Li, Fule Li, Zhihua Wang.
Author:
Li, Weitao.
other author:
Li, Fule.
Published:
Cham :Springer International Publishing :2018.
Description:
xiv, 171 p. :ill., digital ;24 cm.
Contained By:
Springer eBooks
Subject:
Analog-to-digital converters.
Online resource:
http://dx.doi.org/10.1007/978-3-319-62012-1
ISBN:
9783319620121$q(electronic bk.)
High-resolution and high-speed integrated CMOS AD converters for low-power applications
Li, Weitao.
High-resolution and high-speed integrated CMOS AD converters for low-power applications
[electronic resource] /by Weitao Li, Fule Li, Zhihua Wang. - Cham :Springer International Publishing :2018. - xiv, 171 p. :ill., digital ;24 cm. - Analog circuits and signal processing,1872-082X. - Analog circuits and signal processing..
Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
ISBN: 9783319620121$q(electronic bk.)
Standard No.: 10.1007/978-3-319-62012-1doiSubjects--Topical Terms:
207818
Analog-to-digital converters.
LC Class. No.: TK7887.6
Dewey Class. No.: 621.39814
High-resolution and high-speed integrated CMOS AD converters for low-power applications
LDR
:02400nmm a2200325 a 4500
001
527882
003
DE-He213
005
20170802055655.0
006
m d
007
cr nn 008maaau
008
181022s2018 gw s 0 eng d
020
$a
9783319620121$q(electronic bk.)
020
$a
9783319620114$q(paper)
024
7
$a
10.1007/978-3-319-62012-1
$2
doi
035
$a
978-3-319-62012-1
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7887.6
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
082
0 4
$a
621.39814
$2
23
090
$a
TK7887.6
$b
.L693 2018
100
1
$a
Li, Weitao.
$3
799924
245
1 0
$a
High-resolution and high-speed integrated CMOS AD converters for low-power applications
$h
[electronic resource] /
$c
by Weitao Li, Fule Li, Zhihua Wang.
260
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2018.
300
$a
xiv, 171 p. :
$b
ill., digital ;
$c
24 cm.
490
1
$a
Analog circuits and signal processing,
$x
1872-082X
505
0
$a
Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
520
$a
This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
650
0
$a
Analog-to-digital converters.
$3
207818
650
0
$a
Metal oxide semiconductors, Complementary.
$3
184467
650
1 4
$a
Engineering.
$3
210888
650
2 4
$a
Circuits and Systems.
$3
274416
650
2 4
$a
Electronic Circuits and Devices.
$3
495609
650
2 4
$a
Electronics and Microelectronics, Instrumentation.
$3
274412
700
1
$a
Li, Fule.
$3
799925
700
1
$a
Wang, Zhihua.
$3
675992
710
2
$a
SpringerLink (Online service)
$3
273601
773
0
$t
Springer eBooks
830
0
$a
Analog circuits and signal processing.
$3
558088
856
4 0
$u
http://dx.doi.org/10.1007/978-3-319-62012-1
950
$a
Engineering (Springer-11647)
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