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Application-specific hardware archit...
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Belean, Bogdan.
Application-specific hardware architecture design with VHDL
Record Type:
Electronic resources : Monograph/item
Title/Author:
Application-specific hardware architecture design with VHDLby Bogdan Belean.
Author:
Belean, Bogdan.
Published:
Cham :Springer International Publishing :2018.
Description:
xi, 182 p. :ill., digital ;24 cm.
Contained By:
Springer eBooks
Subject:
Computer architecture.
Online resource:
http://dx.doi.org/10.1007/978-3-319-65025-8
ISBN:
9783319650258$q(electronic bk.)
Application-specific hardware architecture design with VHDL
Belean, Bogdan.
Application-specific hardware architecture design with VHDL
[electronic resource] /by Bogdan Belean. - Cham :Springer International Publishing :2018. - xi, 182 p. :ill., digital ;24 cm. - Signals and communication technology,1860-4862. - Signals and communication technology..
Introduction to VHDL -- High Throughput Hardware Architecture for LDPC decoders -- Hardware Architecture for Hamming Codes -- Hardware Architecture for Edge Detection -- Hardware architectures for iterative algorithm implementations -- Content addressable memories (CAM) for search algorithms optimization.
This book guides readers through the design of hardware architectures using VHDL for digital communication and image processing applications that require performance computing. Further it includes the description of all the VHDL-related notions, such as language, levels of abstraction, combinational vs. sequential logic, structural and behavioral description, digital circuit design, and finite state machines. It also includes numerous examples to make the concepts presented in text more easily understandable.
ISBN: 9783319650258$q(electronic bk.)
Standard No.: 10.1007/978-3-319-65025-8doiSubjects--Topical Terms:
183006
Computer architecture.
LC Class. No.: QA76.9.A73 / B45 2018
Dewey Class. No.: 004.22
Application-specific hardware architecture design with VHDL
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2018.
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ill., digital ;
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24 cm.
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Introduction to VHDL -- High Throughput Hardware Architecture for LDPC decoders -- Hardware Architecture for Hamming Codes -- Hardware Architecture for Edge Detection -- Hardware architectures for iterative algorithm implementations -- Content addressable memories (CAM) for search algorithms optimization.
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This book guides readers through the design of hardware architectures using VHDL for digital communication and image processing applications that require performance computing. Further it includes the description of all the VHDL-related notions, such as language, levels of abstraction, combinational vs. sequential logic, structural and behavioral description, digital circuit design, and finite state machines. It also includes numerous examples to make the concepts presented in text more easily understandable.
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based on 0 review(s)
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EB QA76.9.A73 B428 2018 2018.
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