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Thread and data mapping for multicor...
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Cruz, Eduardo H. M.
Thread and data mapping for multicore systemsimproving communication and memory accesses /
Record Type:
Electronic resources : Monograph/item
Title/Author:
Thread and data mapping for multicore systemsby Eduardo H. M. Cruz, Matthias Diener, Philippe O. A. Navaux.
Reminder of title:
improving communication and memory accesses /
Author:
Cruz, Eduardo H. M.
other author:
Diener, Matthias.
Published:
Cham :Springer International Publishing :2018.
Description:
ix, 54 p. :ill., digital ;24 cm.
Contained By:
Springer eBooks
Subject:
Parallel programming (Computer science)
Online resource:
http://dx.doi.org/10.1007/978-3-319-91074-1
ISBN:
9783319910741$q(electronic bk.)
Thread and data mapping for multicore systemsimproving communication and memory accesses /
Cruz, Eduardo H. M.
Thread and data mapping for multicore systems
improving communication and memory accesses /[electronic resource] :by Eduardo H. M. Cruz, Matthias Diener, Philippe O. A. Navaux. - Cham :Springer International Publishing :2018. - ix, 54 p. :ill., digital ;24 cm. - SpringerBriefs in computer science,2191-5768. - SpringerBriefs in computer science..
preface -- chapter 1: introduction -- chapter 2: Sharing-aware mapping and parallel architectures -- chapter 3: Sharing-aware mapping and parallel applications -- chapter 4: Sharing-Aware mapping methods -- chapter 5: Improving performance with Sharing-Aware mapping -- chapter 6: conclusion and research prospects -- index.
This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures. It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures. On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access. Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.
ISBN: 9783319910741$q(electronic bk.)
Standard No.: 10.1007/978-3-319-91074-1doiSubjects--Topical Terms:
215285
Parallel programming (Computer science)
LC Class. No.: QA76.642
Dewey Class. No.: 005.275
Thread and data mapping for multicore systemsimproving communication and memory accesses /
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preface -- chapter 1: introduction -- chapter 2: Sharing-aware mapping and parallel architectures -- chapter 3: Sharing-aware mapping and parallel applications -- chapter 4: Sharing-Aware mapping methods -- chapter 5: Improving performance with Sharing-Aware mapping -- chapter 6: conclusion and research prospects -- index.
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This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures. It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures. On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access. Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.
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Computer Science (Springer-11645)
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EB QA76.642 C957 2018 2018
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http://dx.doi.org/10.1007/978-3-319-91074-1
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